[PATCH][AArch64] Improve SHA1 scheduling
James Greenhalgh
james.greenhalgh@arm.com
Tue Dec 6 16:58:00 GMT 2016
On Tue, Dec 06, 2016 at 03:10:50PM +0000, Wilco Dijkstra wrote:
> Â
>
> ping
I haven't seen a follow-up to Andrew's point regarding other
read-modify-write operations.
Did youi investigate the cost of these?
James
>
>
> From: Wilco Dijkstra
> Sent: 25 October 2016 18:08
> To: GCC Patches
> Cc: nd
> Subject: [PATCH][AArch64] Improve SHA1 scheduling
> Â Â Â
> SHA1H instructions may be scheduled after a SHA1C instruction
> that uses the same input register. However SHA1C updates its input,
> so if SHA1H is scheduled after it, it requires an extra move.
> Increase the priority of SHA1H to ensure it gets scheduled
> earlier, avoiding the move.
>
> Is this something the generic scheduler could do automatically for
> instructions with RMW operands?
>
> Passes bootstrap & regress. OK for commit?
>
> ChangeLog:
> 2016-10-25 Wilco Dijkstra <wdijkstr@arm.com>
>
> Â Â Â Â Â Â Â * config/aarch64/aarch64.c (aarch64_sched_adjust_priority)
> Â Â Â Â Â Â Â New function.
> Â Â Â Â Â Â Â (TARGET_SCHED_ADJUST_PRIORITY): Define target hook.
      Â
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