[PATCH v2,rs6000] Add built-in function support for Power9 byte instructions.
Kelvin Nilsen
kdnilsen@linux.vnet.ibm.com
Tue Dec 6 03:56:00 GMT 2016
This patch adds built-in function support for the new setb, cmprb, and
cmpeqb Power9 instructions. This second version of the patch differs
from the first in the following ways:
1. Removed the UNSPEC_SETB new unspec value. Rewrote these patterns to
describe semantics in terms of primitive RTL.
2. Changed the names of the cmprb_p, cmprb2_p, and cmpeqb_p define_insn
patterns to cmprb, cmprb2, and cmpeqb respectively.
3. Fixed two typos in the ChangeLog file.
4. Fixed comments that describe the cmprb and cmprb2 define_expand
patterns.
5. Fixed comments that describe the *cmprb, *setb, and *cmprb2
define_insn patterns.
6. Removed trailing space in description of the cmpeqb define_expand
pattern.
The patch has been bootstrapped and tested on
powerpc64le-unknown-linux and powerpc-unknown-linux (big-endian, with
both -m32 and -m64 target options) with no regressions.
Is this ok for the trunk?
gcc/testsuite/ChangeLog:
2016-12-05 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/byte-in-either-range-0.c: New test.
* gcc.target/powerpc/byte-in-either-range-1.c: New test.
* gcc.target/powerpc/byte-in-range-0.c: New test.
* gcc.target/powerpc/byte-in-range-1.c: New test.
* gcc.target/powerpc/byte-in-set-0.c: New test.
* gcc.target/powerpc/byte-in-set-1.c: New test.
* gcc.target/powerpc/byte-in-set-2.c: New test.
gcc/ChangeLog:
2016-12-05 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/altivec.md (UNSPEC_CMPRB): New unspec value.
(UNSPEC_CMPRB2): New unspec value.
(UNSPEC_CMPEQB): New unspec value.
(cmprb): New expansion.
(*cmprb): New insn.
(*setb): New insn.
(cmprb2): New expansion.
(*cmprb2): New insn.
(cmpeqb): New expansion.
(*cmpeqb): New insn.
* config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_AV_2): New macro.
(BU_P9_OVERLOAD_2): Likewise.
(CMPRB): Add byte-in-range built-in function.
(CMBRB2): Add byte-in-either-range built-in function.
(CMPEQB): Add byte-in-set built-in function.
(CMPRB): Add overload support for byte-in-range function.
(CMPRB2): Add overload support for byte-in-either-range function.
(CMPEQB): Add overload support for byte-in-set built-in function.
* config/rs6000/rs6000-c.c (P9V_BUILTIN_SCALAR_CMPRB): Macro
expansion to define argument types for new builtin.
(P9V_BUILTIN_SCALAR_CMPRB2): Likewise.
(P9V_BUILTIN_SCALAR_CMPEQB): Likewise.
* doc/extend.texi (PowerPC AltiVec Built-in Functions): Rearrange
the order of presentation for certain built-in functions
(scalar_extract_exp, scalar_extract_sig, scalar_insert_exp)
(scalar_cmp_exp_gt, scalar_cmp_exp_lt, scalar_cmp_exp_eq)
(scalar_cmp_exp_unordered, scalar_test_data_class)
(scalar_test_neg) to improve locality and flow. Document
the new __builtin_scalar_byte_in_set,
__builtin_scalar_byte_in_range, and
__builtin_scalar_byte_in_either_range functions.
Index: gcc/config/rs6000/altivec.md
===================================================================
--- gcc/config/rs6000/altivec.md (revision 241245)
+++ gcc/config/rs6000/altivec.md (working copy)
@@ -153,6 +153,9 @@
UNSPEC_BCDADD
UNSPEC_BCDSUB
UNSPEC_BCD_OVERFLOW
+ UNSPEC_CMPRB
+ UNSPEC_CMPRB2
+ UNSPEC_CMPEQB
])
(define_c_enum "unspecv"
@@ -3709,6 +3712,138 @@
"darn %0,1"
[(set_attr "type" "integer")])
+;; Predicate: test byte within range.
+;; Return in target register operand 0 a value of 1 if the byte
+;; held in bits 24:31 of operand 1 is within the inclusive range
+;; bounded above by operand 2's bits 0:7 and below by operand 2's
+;; bits 8:15. Otherwise, set register operand 0 to 0.
+(define_expand "cmprb"
+ [(set (match_dup 3)
+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+ (match_operand:SI 2 "gpc_reg_operand" "r")]
+ UNSPEC_CMPRB))
+ (set (match_operand:SI 0 "gpc_reg_operand" "=r")
+ (if_then_else:SI (lt (match_dup 3)
+ (const_int 0))
+ (const_int -1)
+ (if_then_else (gt (match_dup 3)
+ (const_int 0))
+ (const_int 1)
+ (const_int 0))))]
+ "TARGET_P9_MISC"
+{
+ operands[3] = gen_reg_rtx (CCmode);
+})
+
+;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 iff the
+;; byte found in bits 24:31 of register operand 1 is within the
+;; inclusive range bounded above by operand 2's bits 0:7 and below by
+;; operand 2's bits 8:15. The other 3 bits of the target CR register
+;; are set to 0.
+(define_insn "*cmprb"
+ [(set (match_operand:CC 0 "cc_reg_operand" "=y")
+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+ (match_operand:SI 2 "gpc_reg_operand" "r")]
+ UNSPEC_CMPRB))]
+ "TARGET_P9_MISC"
+ "cmprb %0,0,%1,%2"
+ [(set_attr "type" "logical")])
+
+;; Set operand 0 register to -1 iff the LT bit (0x8) of condition
+;; register operand 1 is on. Otherwise, set operand 0 register to 1
+;; iff the GT bit (0x4) of condition register operand 1 is on.
+;; Otherwise, set operand 0 to 0. Note that the result stored into
+;; register operand 0 is non-zero iff either LT or GT bits are on
+;; within condition register operand 1.
+(define_insn "*setb"
+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
+ (if_then_else:SI (lt (match_operand:CC 1 "cc_reg_operand" "y")
+ (const_int 0))
+ (const_int -1)
+ (if_then_else (gt (match_dup 1)
+ (const_int 0))
+ (const_int 1)
+ (const_int 0))))]
+ "TARGET_P9_MISC"
+ "setb %0,%1"
+ [(set_attr "type" "logical")])
+
+;; Predicate: test byte within two ranges.
+;; Return in target register operand 0 a value of 1 if the byte
+;; held in bits 24:31 of operand 1 is within the inclusive range
+;; bounded above by operand 2's bits 0:7 and below by operand 2's
+;; bits 8:15 or if the byte is within the inclusive range bounded
+;; above by operand 2's bits 16:23 and below by operand 2's bits 24:31.
+;; Otherwise, set register operand 0 to 0.
+(define_expand "cmprb2"
+ [(set (match_dup 3)
+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+ (match_operand:SI 2 "gpc_reg_operand" "r")]
+ UNSPEC_CMPRB2))
+ (set (match_operand:SI 0 "gpc_reg_operand" "=r")
+ (if_then_else:SI (lt (match_dup 3)
+ (const_int 0))
+ (const_int -1)
+ (if_then_else (gt (match_dup 3)
+ (const_int 0))
+ (const_int 1)
+ (const_int 0))))]
+ "TARGET_P9_MISC"
+{
+ operands[3] = gen_reg_rtx (CCmode);
+})
+
+;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 iff the
+;; byte found in bits 24:31 of register operand 1 is within the
+;; inclusive range bounded above by operand 2's bits 0:7 and below by
+;; operand 2's bits 8:15 or within the inclusive range bounded above
+;; by operand 2's bits 16:23 and below by operand 2's bits 24:31. The
+;; other 3 bits of the target CR register are set to 0.
+(define_insn "*cmprb2"
+ [(set (match_operand:CC 0 "cc_reg_operand" "=y")
+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+ (match_operand:SI 2 "gpc_reg_operand" "r")]
+ UNSPEC_CMPRB2))]
+ "TARGET_P9_MISC"
+ "cmprb %0,1,%1,%2"
+ [(set_attr "type" "logical")])
+
+;; Predicate: test byte membership within set of 8 bytes.
+;; Return in target register operand 0 a value of 1 if the byte
+;; held in bits 24:31 of operand 1 equals at least one of the eight
+;; byte values represented by the 64-bit register supplied as operand
+;; 2. Otherwise, set register operand 0 to 0. Note that the 8 byte
+;; values held within operand 2 need not be unique.
+(define_expand "cmpeqb"
+ [(set (match_dup 3)
+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_CMPEQB))
+ (set (match_operand:SI 0 "gpc_reg_operand" "=r")
+ (if_then_else:SI (lt (match_dup 3)
+ (const_int 0))
+ (const_int -1)
+ (if_then_else (gt (match_dup 3)
+ (const_int 0))
+ (const_int 1)
+ (const_int 0))))]
+ "TARGET_P9_MISC && TARGET_64BIT"
+{
+ operands[3] = gen_reg_rtx (CCmode);
+})
+
+;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 iff the
+;; byte found in bits 24:31 of register operand 1 equals one of the 8
+;; bytes found within register operand 2.
+(define_insn "*cmpeqb"
+ [(set (match_operand:CC 0 "cc_reg_operand" "=y")
+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_CMPEQB))]
+ "TARGET_P9_MISC && TARGET_64BIT"
+ "cmpeqb %0,%1,%2"
+ [(set_attr "type" "logical")])
+
(define_expand "bcd<bcd_add_sub>_<code>"
[(parallel [(set (reg:CCFP CR6_REGNO)
(compare:CCFP
Index: gcc/config/rs6000/rs6000-builtin.def
===================================================================
--- gcc/config/rs6000/rs6000-builtin.def (revision 241245)
+++ gcc/config/rs6000/rs6000-builtin.def (working copy)
@@ -773,6 +773,15 @@
| RS6000_BTC_BINARY), \
CODE_FOR_ ## ICODE) /* ICODE */
+#define BU_P9V_64BIT_AV_2(ENUM, NAME, ATTR, ICODE) \
+ RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \
+ "__builtin_altivec_" NAME, /* NAME */ \
+ RS6000_BTM_P9_VECTOR \
+ | RS6000_BTM_64BIT, /* MASK */ \
+ (RS6000_BTC_ ## ATTR /* ATTR */ \
+ | RS6000_BTC_BINARY), \
+ CODE_FOR_ ## ICODE) /* ICODE */
+
#define BU_P9V_AV_3(ENUM, NAME, ATTR, ICODE) \
RS6000_BUILTIN_3 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \
"__builtin_altivec_" NAME, /* NAME */ \
@@ -848,6 +857,15 @@
(RS6000_BTC_OVERLOADED /* ATTR */ \
| RS6000_BTC_TERNARY), \
CODE_FOR_nothing) /* ICODE */
+
+#define BU_P9_OVERLOAD_2(ENUM, NAME) \
+ RS6000_BUILTIN_2 (P9V_BUILTIN_SCALAR_ ## ENUM, /* ENUM */ \
+ "__builtin_scalar_" NAME, /* NAME */ \
+ RS6000_BTM_P9_VECTOR, /* MASK */ \
+ (RS6000_BTC_OVERLOADED /* ATTR */ \
+ | RS6000_BTC_BINARY), \
+ CODE_FOR_nothing) /* ICODE */
+
#endif
@@ -2004,6 +2022,16 @@ BU_P9V_OVERLOAD_1 (VPRTYBD, "vprtybd")
BU_P9V_OVERLOAD_1 (VPRTYBQ, "vprtybq")
BU_P9V_OVERLOAD_1 (VPRTYBW, "vprtybw")
+/* 2 argument functions added in ISA 3.0 (power9). */
+BU_P9V_AV_2 (CMPRB, "byte_in_range", CONST, cmprb)
+BU_P9V_AV_2 (CMPRB2, "byte_in_either_range", CONST, cmprb2)
+BU_P9V_64BIT_AV_2 (CMPEQB, "byte_in_set", CONST, cmpeqb)
+
+/* 2 argument overloaded functions added in ISA 3.0 (power9). */
+BU_P9_OVERLOAD_2 (CMPRB, "byte_in_range")
+BU_P9_OVERLOAD_2 (CMPRB2, "byte_in_either_range")
+BU_P9_OVERLOAD_2 (CMPEQB, "byte_in_set")
+
/* 1 argument IEEE 128-bit floating-point functions. */
BU_FLOAT128_1 (FABSQ, "fabsq", CONST, abskf2)
Index: gcc/config/rs6000/rs6000-c.c
===================================================================
--- gcc/config/rs6000/rs6000-c.c (revision 241245)
+++ gcc/config/rs6000/rs6000-c.c (working copy)
@@ -4556,6 +4556,13 @@ const struct altivec_builtin_types altivec_overloa
{ P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ,
RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 },
+ { P9V_BUILTIN_SCALAR_CMPRB, P9V_BUILTIN_CMPRB,
+ RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 },
+ { P9V_BUILTIN_SCALAR_CMPRB2, P9V_BUILTIN_CMPRB2,
+ RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 },
+ { P9V_BUILTIN_SCALAR_CMPEQB, P9V_BUILTIN_CMPEQB,
+ RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTDI, 0 },
+
{ P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,
RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
{ P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,
Index: gcc/doc/extend.texi
===================================================================
--- gcc/doc/extend.texi (revision 241245)
+++ gcc/doc/extend.texi (working copy)
@@ -15015,6 +15015,27 @@ long long __builtin_darn (void);
long long __builtin_darn_raw (void);
int __builtin_darn_32 (void);
+unsigned int scalar_extract_exp (double source);
+unsigned long long int scalar_extract_sig (double source);
+
+double
+scalar_insert_exp (unsigned long long int significand, unsigned long long int exponent);
+
+int scalar_cmp_exp_gt (double arg1, double arg2);
+int scalar_cmp_exp_lt (double arg1, double arg2);
+int scalar_cmp_exp_eq (double arg1, double arg2);
+int scalar_cmp_exp_unordered (double arg1, double arg2);
+
+int scalar_test_data_class (float source, unsigned int condition);
+int scalar_test_data_class (double source, unsigned int condition);
+
+int scalar_test_neg (float source);
+int scalar_test_neg (double source);
+
+int __builtin_scalar_byte_in_set (unsigned char u, unsigned long long set);
+int __builtin_scalar_byte_in_range (unsigned char u, unsigned int range);
+int __builtin_scalar_byte_in_either_range (unsigned char u, unsigned int ranges);
+
int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal128 value);
int __builtin_dfp_dtstsfi_lt_dd (unsigned int comparison, _Decimal64 value);
@@ -15034,23 +15055,6 @@ int __builtin_dfp_dtstsfi_ov (unsigned int compari
int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal128 value);
int __builtin_dfp_dtstsfi_ov_dd (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_ov_td (unsigned int comparison, _Decimal128 value);
-
-unsigned int scalar_extract_exp (double source);
-unsigned long long int scalar_extract_sig (double source);
-
-double
-scalar_insert_exp (unsigned long long int significand, unsigned long long int exponent);
-
-int scalar_cmp_exp_gt (double arg1, double arg2);
-int scalar_cmp_exp_lt (double arg1, double arg2);
-int scalar_cmp_exp_eq (double arg1, double arg2);
-int scalar_cmp_exp_unordered (double arg1, double arg2);
-
-int scalar_test_data_class (float source, unsigned int condition);
-int scalar_test_data_class (double source, unsigned int condition);
-
-int scalar_test_neg (float source);
-int scalar_test_neg (double source);
@end smallexample
The @code{__builtin_darn} and @code{__builtin_darn_raw}
@@ -15105,6 +15109,22 @@ If all of the enabled test conditions are false, t
The @code{scalar_test_neg} built-in functions return a non-zero value
if their @code{source} argument holds a negative value.
+The @code{__builtin_scalar_byte_in_set} function requires a
+64-bit environment supporting ISA 3.0 or later. This function returns
+a non-zero value if and only if its @code{u} argument exactly equals one of
+the eight bytes contained within its 64-bit @code{set} argument.
+
+The @code{__builtin_scalar_byte_in_range} and
+@code{__builtin_scalar_byte_in_either_range} require an environment
+supporting ISA 3.0 or later. The first of these functions returns a
+non-zero value if and only if its @code{u} argument is within the
+range bounded between @code{(range >> 24)} and @code{((range >> 16) & 0xff)}
+inclusive. The second of these functions returns non-zero if and only
+if its @code{u} argument is either within the range bounded between
+@code{(range >> 24)} and @code{((range >> 16) & 0xff)}
+inclusive or is within the range bounded between
+@code{((range >> 8) & 0xff)} and @code{(range & 0xff)} inclusive.
+
The @code{__builtin_dfp_dtstsfi_lt} function returns a non-zero value
if and only if the number of signficant digits of its @code{value} argument
is less than its @code{comparison} argument. The
Index: gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c (working copy)
@@ -0,0 +1,25 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations. */
+#include <altivec.h>
+
+int
+test_byte_in_either_range (unsigned char b,
+ unsigned char first_lo_bound,
+ unsigned char first_hi_bound,
+ unsigned char second_lo_bound,
+ unsigned char second_hi_bound)
+{
+ unsigned int range_encoding;
+ range_encoding = ((first_hi_bound << 24) | (first_lo_bound << 16)
+ | (second_hi_bound << 8) | second_lo_bound);
+
+ return __builtin_scalar_byte_in_either_range (b, range_encoding);
+}
+
+/* { dg-final { scan-assembler "cmprb" } } */
+/* { dg-final { scan-assembler "setb" } } */
Index: gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c (working copy)
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+/* This test should succeed on both 32- and 64-bit configurations. */
+#include <altivec.h>
+
+int
+test_byte_in_either_range (unsigned char b,
+ unsigned char first_lo_bound,
+ unsigned char first_hi_bound,
+ unsigned char second_lo_bound,
+ unsigned char second_hi_bound)
+{
+ unsigned int range_encoding;
+ range_encoding = ((first_hi_bound << 24) | (first_lo_bound << 16)
+ | (second_hi_bound << 8) | second_lo_bound);
+
+ return __builtin_scalar_byte_in_either_range (b, range_encoding); /* { dg-error "Builtin function __builtin_altivec_byte_in_either_range requires" } */
+}
Index: gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c (working copy)
@@ -0,0 +1,19 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations. */
+#include <altivec.h>
+
+int
+test_byte_in_range (unsigned char b,
+ unsigned char low_range, unsigned char high_range)
+{
+ unsigned int range_encoding = (high_range << 24) | (low_range << 16);
+ return __builtin_scalar_byte_in_range (b, range_encoding);
+}
+
+/* { dg-final { scan-assembler "cmprb" } } */
+/* { dg-final { scan-assembler "setb" } } */
Index: gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c (working copy)
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int
+test_byte_in_range (unsigned char b,
+ unsigned char low_range, unsigned char high_range)
+{
+ unsigned int range_encoding = (high_range << 24) | (low_range << 16);
+ return __builtin_scalar_byte_in_range (b, range_encoding); /* { dg-error "Builtin function __builtin_altivec_byte_in_range requires" } */
+}
+
Index: gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c (working copy)
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed only on 64-bit configurations. */
+#include <altivec.h>
+
+int
+test_byte_in_set (unsigned char b, unsigned long long set_members)
+{
+ return __builtin_scalar_byte_in_set (b, set_members);
+}
+
+/* { dg-final { scan-assembler "cmpeqb" } } */
+/* { dg-final { scan-assembler "setb" } } */
Index: gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c (working copy)
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int
+test_byte_in_set (unsigned char b, unsigned long long set_members)
+{
+ return __builtin_scalar_byte_in_set (b, set_members); /* { dg-error "Builtin function __builtin_altivec_byte_in_set requires" } */
+}
Index: gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c (working copy)
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+/* This test should succeed only on 32-bit configurations. */
+
+int
+test_byte_in_set (unsigned char b, unsigned long long set_members)
+{
+ return __builtin_scalar_byte_in_set (b, set_members); /* { dg-error "Builtin function __builtin_scalar_byte_in_set not supported in this compiler configuration" } */
+}
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