[PATCH] [ARC] Fix emitting jump tables for ARCv2

[Claudiu Zissulescu]

The compact casesi option only make sens for ARCv1 cores. For ARCv2 cores we
use the regular expansion.

OK to apply?
Claudiu

gcc/
2016-04-26  Claudiu Zissulescu  <claziss@synopsys.com>

	* common/config/arc/arc-common.c (arc_option_optimization_table):
	Disable compact casesi as default option.
	* config/arc/arc.c (arc_override_options): Enable compact casesi
	option for non-ARCv2 cores.
	* config/arc/arc.md (movsi_insn): Use @pcl relocation.
	(movsi_ne): Update assembly printing pattern.
	(casesi_load): Use short ld instruction.
---
 gcc/common/config/arc/arc-common.c |  1 -
 gcc/config/arc/arc.c               |  7 +++++++
 gcc/config/arc/arc.md              | 11 +++++++----
 3 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/gcc/common/config/arc/arc-common.c b/gcc/common/config/arc/arc-common.c
index 64fb053..17cc1bd 100644
--- a/gcc/common/config/arc/arc-common.c
+++ b/gcc/common/config/arc/arc-common.c
@@ -56,7 +56,6 @@ static const struct default_options arc_option_optimization_table[] =
     { OPT_LEVELS_ALL, OPT_mbbit_peephole, NULL, 1 },
     { OPT_LEVELS_SIZE, OPT_mq_class, NULL, 1 },
     { OPT_LEVELS_SIZE, OPT_mcase_vector_pcrel, NULL, 1 },
-    { OPT_LEVELS_SIZE, OPT_mcompact_casesi, NULL, 1 },
     { OPT_LEVELS_NONE, 0, NULL, 0 }
   };
 
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 6f2136e..be55c99 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -812,6 +812,13 @@ arc_override_options (void)
   if (arc_size_opt_level == 3)
     optimize_size = 1;
 
+  /* Compact casesi is not a valid option for ARCv2 family, disable
+     it.  */
+  if (TARGET_V2)
+    TARGET_COMPACT_CASESI = 0;
+  else if (optimize_size == 1)
+    TARGET_COMPACT_CASESI = 1;
+
   if (flag_pic)
     target_flags |= MASK_NO_SDATA_SET;
 
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 718443b..aec4b37 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -713,7 +713,7 @@
    ror %0,((%1*2+1) & 0x3f) ;6
    mov%? %0,%1		;7
    add %0,%S1		;8
-   * return arc_get_unalign () ? \"add %0,pcl,%1-.+2\" : \"add %0,pcl,%1-.\";
+   add %0,pcl,%1@pcl
    mov%? %0,%S1%&	;10
    mov%? %0,%S1		;11
    ld%?%U1 %0,%1%&	;12
@@ -3467,8 +3467,8 @@
   ""
   "@
 	* current_insn_predicate = 0; return \"sub%?.ne %0,%0,%0%&\";
-        mov_s.ne %0,%1
-        mov_s.ne %0,%1
+        * current_insn_predicate = 0; return \"mov%?.ne %0,%1\";
+        * current_insn_predicate = 0; return \"mov%?.ne %0,%1\";
 	mov.ne %0,%1
 	mov.ne %0,%S1"
   [(set_attr "type" "cmove")
@@ -3777,7 +3777,10 @@
   switch (GET_MODE (diff_vec))
     {
     case SImode:
-      return \"ld.as %0,[%1,%2]%&\";
+      if ((which_alternative == 0) && TARGET_CODE_DENSITY)
+	return \"ld_s.as %0,[%1,%2]%&\";
+      else
+	return \"ld.as %0,[%1,%2]%&\";
     case HImode:
       if (ADDR_DIFF_VEC_FLAGS (diff_vec).offset_unsigned)
 	return \"ld%_.as %0,[%1,%2]\";
-- 
1.9.1