[PATCH][PR rtl-optimization/69307] Handle hard registers in modes that span more than one register properly

[Christophe Lyon]

On 31 March 2016 at 16:55, Andrey Belevantsev <abel@ispras.ru> wrote:
> Hello,
>
> On 12.03.2016 20:13, Jeff Law wrote:
>>
>>
>> As Andrey outlined in the PR, selective-scheduling was missing a check &
>> handling of hard registers in modes that span more than one hard reg. This
>> caused an incorrect register selection during renaming.
>>
>> I verified removing the printf call from the test would not compromise the
>> test.  Then I did a normal x86 bootstrap & regression test with the patch.
>> Of course that's essentially useless, so I also did another bootstrap and
>> regression test with -fselective-scheduling in BOOT_CFLAGS with and
>> without
>> this patch.  In both cases there were no regressions.
>>
>> I'm installing Andrey's patch on the trunk.  I'm not sure this is worth
>> addressing in gcc-5.
>
>
> I've looked at the patch again and as it fixes general code and has a
> regression marker I've included it in the bunch of other PRs that were
> backported to gcc-5.  I forgot you were hesitant putting it to gcc-5 though
> :) So I can revert it from the branch if you want me to.
>
> Andrey
>

Hi,

I've noticed that the backport in the gcc-5 branch shows an ICE on
gcc.dg/pr69307.c
when GCC is configured --with-target arm-none-linux-gnueabihf
--with-cpu=cortex-a15 --with-fpu=neon-vfpv4
/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/pr69307.c: In
function 'foo':
/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/pr69307.c:25:1:
internal compiler error: in autopref_multipass_dfa_l
ookahead_guard, at haifa-sched.c:5752
0xfa450e autopref_multipass_dfa_lookahead_guard(rtx_insn*, int)
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/haifa-sched.c:5752
0xa31d42 invoke_dfa_lookahead_guard
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sel-sched.c:4225
0xa31d42 find_best_expr
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sel-sched.c:4428
0xa3446b fill_insns
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sel-sched.c:5583
0xa3446b schedule_on_fences
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sel-sched.c:7408
0xa36080 sel_sched_region_2
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sel-sched.c:7546
0xa36f9a sel_sched_region_1
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sel-sched.c:7588
0xa36f9a sel_sched_region(int)
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sel-sched.c:7689
0xa375f9 run_selective_scheduling()
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sel-sched.c:7765
0xa14aed rest_of_handle_sched2
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sched-rgn.c:3647
0xa14aed execute
        /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/sched-rgn.c:3791

See http://people.linaro.org/~christophe.lyon/cross-validation/gcc/gcc-5-branch/234629/arm-none-linux-gnueabihf/diff-gcc-rh60-arm-none-linux-gnueabihf-arm-cortex-a15-neon-vfpv4.txt

Christophe.


>>
>> Jeff
>
>