[PATCH] PR67421, Cost instruction sequences when doing left wide shift

[Jeff Law]

On 09/03/2015 09:34 AM, Jiong Wang wrote:
>
> As Rainer reported at
>
>    https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67421
>
> Also, as described at
>
>    https://gcc.gnu.org/ml/gcc-patches/2015-08/msg01147.html
>
> This patch relax the restriction on wide left shift. Previously we
> always honor target private pattern, so when the following check be
> true, we cancel the transformation.
>
>    have_insn_for (ASHIFT, mode)
>
> While it's better to do a cost on generated instruction sequences to
> decided whether it's beneficial to honor backend pattern. Normally the
> generic transformation will be better.
>
> I haven't used GEN_FCN to invoke gen_* directly, instead I reused
> "expand_variable_shift" to let it handle all the left work.
>
> wide-shift-64 pass on sparc under the option "-mv8plus -mcpu=v9" now,
> and arm32 also generate better code for wide-shift-64.
>
> OK for trunk?
>
> 2015-09-03  Jiong. Wang  <jiong.wang@arm.com>
>
> gcc/
>    PR rtl-optimization/67421
>    * expr.c (expand_expr_real_2): Cost instrcution sequences when doing
>    left wide shift tranformation.
OK.

Note this hopefully allows targets that define double-word shift 
patterns to benefit from your changes.  Please watch for additional 
fall-out as your sequences are getting wider usage.

Thanks,
jeff