[Aarch64][target/PR 67143][5.2] Backport correct constraints for atomic operations.

Matthew Wahab matthew.wahab@foss.arm.com
Wed Sep 9 12:29:00 GMT 2015


The Aarch64 instruction patterns for atomic operations on memory use
the same constraints for arithmetic and logical operations despite the
arithmetic operations requiring stronger restrictions. This causes an
ICE in some circumstances.

This patch backports the fix from trunk to the GCC-5 branch.

The original patch is at:
https://gcc.gnu.org/ml/gcc-patches/2015-08/msg00518.html.
The commit is at: https://gcc.gnu.org/ml/gcc-cvs/2015-08/msg00437.html.

Tested for aarch64-none-elf with cross-compiled check-gcc and for
aarch64-none-linux-gnu with native bootstrap and make check.

Ok for the branch?
Matthew

gcc/
2015-09-09  Matthew Wahab  <matthew.wahab@arm.com>

	Backport from mainline
	2015-08-14  Matthew Wahab  <matthew.wahab@arm.com>

	PR target/67143
	* config/aarch64/atomics.md (atomic_<optab><mode>): Replace
	'lconst_atomic' with 'const_atomic'.
	(atomic_fetch_<optab><mode>): Likewise.
	(atomic_<optab>_fetch<mode>): Likewise.
	* config/aarch64/iterators.md (lconst-atomic): Move below
	'const_atomic'.
	(const_atomic): New.

gcc/testsuite/
2015-09-09  Matthew Wahab  <matthew.wahab@arm.com>

	Backport from mainline
	2015-08-14  Matthew Wahab  <matthew.wahab@arm.com>
		    Matthias Klose  <doko@debian.org>

	PR target/67143
	* gcc.c-torture/compile/pr67143.c: New
	* gcc.target/aarch64/atomic-op-imm.c
	(atomic_fetch_add_negative_RELAXED): New.
	(atomic_fetch_sub_negative_ACQUIRE): New.
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