[PR64164] drop copyrename, integrate into expand

Alan Lawrence alan.lawrence@arm.com
Tue Nov 10 15:31:00 GMT 2015


On 05/11/15 05:08, Alexandre Oliva wrote:
> [PR67753] fix copy of PARALLEL entry_parm to CONCAT target_reg
> for  gcc/ChangeLog
>
> 	PR rtl-optimization/67753
> 	PR rtl-optimization/64164
> 	* function.c (assign_parm_setup_block): Avoid allocating a
> 	stack slot if we don't have an ABI-reserved one.  Emit the
> 	copy to target_reg in the conversion seq if the copy from
> 	entry_parm is in it too.  Don't use the conversion seq to copy
> 	a PARALLEL to a REG or a CONCAT.

Since this change, we have on aarch64_be:

FAIL: gcc.target/aarch64/aapcs64/func-ret-4.c execution,  -O1
FAIL: gcc.target/aarch64/aapcs64/func-ret-4.c execution,  -O2
FAIL: gcc.target/aarch64/aapcs64/func-ret-4.c execution,  -O3 -g
FAIL: gcc.target/aarch64/aapcs64/func-ret-4.c execution,  -Os
FAIL: gcc.target/aarch64/aapcs64/func-ret-4.c execution,  -Og -g

The difference in the assembler looks as follows (this is at -Og):

  func_return_val_10:
-	sub	sp, sp, #16
-	lsr	x2, x1, 48
-	lsr	x1, x1, 32
+	ubfx	x2, x1, 16, 16
  	fmov	x3, d0
  	// Start of user assembly
  // 23 "func-ret-4.c" 1
  	mov x0, x30
  // 0 "" 2
  	// End of user assembly
  	adrp	x3, saved_return_address
  	str	x0, [x3, #:lo12:saved_return_address]
  	adrp	x0, myfunc
  	add	x0, x0, :lo12:myfunc
  	// Start of user assembly
  // 23 "func-ret-4.c" 1
  	mov x30, x0
  // 0 "" 2
  	// End of user assembly
  	bfi	w0, w2, 16, 16
  	bfi	w0, w1, 0, 16
  	lsl	x0, x0, 32
-	add	sp, sp, 16

(ubfx is a bitfield extract, the first immediate is the lsbit, the second the 
width. lsr = logical shift right.) And in the RTL dump, this (before the patch):

(insn 4 3 5 2 (set (mem/c:DI (plus:DI (reg/f:DI 68 virtual-stack-vars)
                 (const_int -8 [0xfffffffffffffff8])) [0 t+0 S8 A64])
         (reg:DI 1 x1)) func-ret-4.c:23 -1
      (nil))
(insn 5 4 6 2 (set (reg:HI 78 [ t ])
         (mem/c:HI (plus:DI (reg/f:DI 68 virtual-stack-vars)
                 (const_int -8 [0xfffffffffffffff8])) [0 t+0 S2 A64])) 
func-ret-4.c:23 -1
      (nil))
(insn 6 5 7 2 (set (reg:HI 79 [ t+2 ])
         (mem/c:HI (plus:DI (reg/f:DI 68 virtual-stack-vars)
                 (const_int -6 [0xfffffffffffffffa])) [0 t+2 S2 A16])) 
func-ret-4.c:23 -1
      (nil))

becomes (after the patch):

(insn 4 3 5 2 (set (subreg:SI (reg:CHI 80) 0)
         (reg:SI 1 x1 [ t ])) func-ret-4.c:23 -1
      (nil))
(insn 5 4 6 2 (set (reg:SI 81)
         (subreg:SI (reg:CHI 80) 0)) func-ret-4.c:23 -1
      (nil))
(insn 6 5 7 2 (set (subreg:DI (reg:HI 82) 0)
         (zero_extract:DI (subreg:DI (reg:SI 81) 0)
             (const_int 16 [0x10])
             (const_int 16 [0x10]))) func-ret-4.c:23 -1
      (nil))
(insn 7 6 8 2 (set (reg:HI 78 [ t ])
         (reg:HI 82)) func-ret-4.c:23 -1
      (nil))
(insn 8 7 9 2 (set (reg:SI 83)
         (subreg:SI (reg:CHI 80) 0)) func-ret-4.c:23 -1
      (nil))
(insn 9 8 10 2 (set (reg:HI 79 [ t+2 ])
         (subreg:HI (reg:SI 83) 2)) func-ret-4.c:23 -1
      (nil))

--Alan



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