[Patch ARM-AArch64/testsuite 00/13] Neon intrinsics executable tests

[James Greenhalgh]

On Tue, May 12, 2015 at 09:30:48PM +0100, Christophe Lyon wrote:
> This patch series is a follow-up to the tests I already contributed,
> converted from my original testsuite.
> 
> This series consists in 13 new files, which can be committed
> independently.
> 
> Another series (hopefully final) will follow.
> 
> Tested with qemu on arm*linux, aarch64-linux. I couldn't test on aarch64_be-none-elf because my build is currently broken (see PR 66018).
> 
> 2015-05-12  Christophe Lyon  <christophe.lyon@linaro.org>
> 
> 	* gcc.target/aarch64/neon-intrinsics/vqmovn.c: New file.
> 	* gcc.target/aarch64/neon-intrinsics/vqmovun.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqrdmulh.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqrdmulh_lane.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqrdmulh_n.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqrshl.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqrshrn_n.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqrshrun_n.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqshl.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqshl_n.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqshlu_n.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqshrn_n.c: Likewise.
> 	* gcc.target/aarch64/neon-intrinsics/vqshrun_n.c: Likewise.

Hi Christophe,

This patch set looks good to me. The patch set is OK, please apply it.

One small nit, could you run through and check the alignment of the
trailing \ in some of the macro definitions? It might be the mail
clients, but I see (for example):

+  /* Basic test: v2=vqshlu_n(v1,v), then store the result.  */
+#define TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
+  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T3, W, N));  \
+  VECT_VAR(vector_res, T3, W, N) =                             \
+    INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),            \
+                       V);                                     \
+  vst1##Q##_##T4##W(VECT_VAR(result, T3, W, N),                        \
+                   VECT_VAR(vector_res, T3, W, N));            \
+  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
+

in patch 11/13.

Also, if you could look out for aarch64_be fallout once the build
starts going, that would be great.

Thanks,
James

> 
> Christophe Lyon (13):
>   Add vqmovn tests.
>   Add vqmovun tests.
>   Add vqrdmulh tests.
>   Add vqrdmulh_lane tests.
>   Add vqrdmulh_n tests.
>   Add vqrshl tests.
>   Add vqrshrn_n tests.
>   Add vqrshrun_n tests.
>   Add vqshl tests.
>   Add vqshl_n tests.
>   Add vqshlu_n tests.
>   Add vqshrn_n tests.
>   Add vqshrun_n tests.
> 
>  .../gcc.target/aarch64/advsimd-intrinsics/vqmovn.c |  134 +++
>  .../aarch64/advsimd-intrinsics/vqmovun.c           |   93 ++
>  .../aarch64/advsimd-intrinsics/vqrdmulh.c          |  161 +++
>  .../aarch64/advsimd-intrinsics/vqrdmulh_lane.c     |  169 +++
>  .../aarch64/advsimd-intrinsics/vqrdmulh_n.c        |  155 +++
>  .../gcc.target/aarch64/advsimd-intrinsics/vqrshl.c | 1090 ++++++++++++++++++++
>  .../aarch64/advsimd-intrinsics/vqrshrn_n.c         |  174 ++++
>  .../aarch64/advsimd-intrinsics/vqrshrun_n.c        |  189 ++++
>  .../gcc.target/aarch64/advsimd-intrinsics/vqshl.c  |  829 +++++++++++++++
>  .../aarch64/advsimd-intrinsics/vqshl_n.c           |  234 +++++
>  .../aarch64/advsimd-intrinsics/vqshlu_n.c          |  263 +++++
>  .../aarch64/advsimd-intrinsics/vqshrn_n.c          |  177 ++++
>  .../aarch64/advsimd-intrinsics/vqshrun_n.c         |  133 +++
>  13 files changed, 3801 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqmovn.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqmovun.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmulh.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmulh_lane.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmulh_n.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshl.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_n.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_n.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshl.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshl_n.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_n.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_n.c
> 
> -- 
> 2.1.4
>