[RFC]: Remove Mem/address type assumption in combiner

Steve Ellcey sellcey@imgtec.com
Mon May 11 19:44:00 GMT 2015


On Mon, 2015-05-11 at 13:22 -0500, Segher Boessenkool wrote:
> Hi Steve,
> 
> On Mon, May 11, 2015 at 10:50:02AM -0700, Steve Ellcey wrote:
> > This patch broke a number of MIPS tests, specifically mips32r6 tests
> > that look for the lsa instruction (load scaled address) which shifts one
> > register and then adds it to a second register.  I am not sure if this
> > needs to be addressed in combine.c or if we need to add a peephole
> > optimization to mips.md to handle the new instruction sequence.  What do
> > you think?  Is the change here what you would expect to see from your
> > patch?
> 
> Yes, this is as expected.  AFAICS the only change you need in the
> MIPS backend is to change the "<GPR:d>lsa" pattern to match a shift
> instead of a mult (and change the "const_immlsa_operand" predicate
> to just match 1..4 instead of the powers).
> 
> 
> Segher

Hm, I thought it was going to be more complicated than that, but it
seems to be working.  I will do a complete test run and then submit a
patch.

Steve Ellcey



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