[PATCH 11/16][AArch64] Implement vcvt_{,high_}f16_f32

[Alan Lawrence]

This comes from https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01343.html but the 
other/unrelated intrinsics have moved into the next patch.

gcc/ChangeLog:

	* config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_v2sf):
	Reparameterize to...
	(aarch64_float_truncate_lo_<mode>): ...this, for both V2SF and V4HF.
	(aarch64_float_truncate_hi_v4sf): Reparameterize to...
	(aarch64_float_truncate_hi_<Vdbl>): ...this, for both V4SF and V8HF.

	* config/aarch64/aarch64-simd-builtins.def (float_truncate_hi_): Add
	v8hf variant.
	(float_truncate_lo_): Use BUILTIN_VDF iterator.

	* config/aarch64/arm_neon.h (vcvt_f16_f32, vcvt_high_f16_f32): New.

	* config/aarch64/iterators.md (VDF, Vdtype): New.
	(VWIDE, Vmwtype): Add cases for V4HF and V2SF.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 11_aarch64_vcvt_f16_f32.patch
Type: text/x-patch
Size: 4588 bytes
Desc: not available
URL: <http://gcc.gnu.org/pipermail/gcc-patches/attachments/20150707/854a4dc3/attachment.bin>