[PATCH][AARCH64]Fix TLS local exec model addressing code generation inconsistency.

[Renlin Li]

Hi all,

The following code sequence should be generated for TLS local exec model 
in aarch64 backend.

add t0, tp, #:tprel_hi12:x1, lsl #12
add t0, #:tprel_lo12_nc:x1

However, we have the following codegen using -S option.

add t0, tp, #:tprel_hi12:x1 <-------- (1)
add t0, #:tprel_lo12_nc:x1


This is not correct from the first impression. The tprel_hi12 should 
left shift 12 bits first and add to thread pointer. However, the gas is 
able to detect tprel_hi12 relocate modifier, and rewrite the instruction 
marked as 1 above into the shifted form. So the final behaviour is correct.

But I think the inconsistency is very confusing. The asm generated by 
Gcc and object dumped from object code are different because of above 
reason.

This patch should fix this small issue.

Okay to commit?

Regards,
Renlin Li

gcc/ChangeLog:

2015-01-20 Renlin Li <Renlin.Li@arm.com>

     * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Correct
     the comment.
     * config/aarch64/aarch64.md (tlsle_small_<mode>): Add left shift 12-bit
     for higher part.
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