[PATCH][AArch64] PR 64448: Combine ((x ^ y) & m) ^ x into bsl/bif instruction

[Kyrill Tkachov]

Hi all,

This patch fixes the PR by folding the ((x ^ y) & m) ^ x form of the RTL 
to a bit-select instruction rather than the previous (x & ~m) | (y & m) 
form.
This is in sync with the match.pd change that introduced the folding:
Author: mpolacek <mpolacek@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Wed Dec 17 11:48:33 2014 +0000

PR middle-end/63568

     match.pd: Add (x & ~m) | (y & m) -> ((x ^ y) & m) ^ x pattern.

I decided to replace the previous pattern rather than add a new combine 
pattern.
I initially thought of leaving the previous pattern in case we used some 
target intrinsics to expand to the and-not-ior form in RTL, but I see
that all the relevant intrinsics in arm_neon.h are implemented using the 
tree-level operators and so their combinations fold into this 
xor-and-xor form.

This patch gets the gcc.target/aarch64/vbslq_u64_1.c test passing again, 
so I'm not adding a new test.

Bootstrapped and tested on aarch64-linux.

Ok for trunk?

Thanks,
Kyrill


2014-01-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     PR target/64448
     * config/aarch64/aarch64-simd.md (aarch64_simd_bsl<mode>_internal):
     Match xor-and-xor RTL pattern.
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