[PATCH][AArch64] Improve bit-test-branch pattern to avoid unnecessary register clobber

[Jiong Wang]

On 15/12/14 15:36, Jiong Wang wrote:

> from the discussion here
>     https://gcc.gnu.org/ml/gcc-patches/2014-11/msg01949.html
>
> the other problem it exposed is the unnecessary clobber of register x19
> which
> is a callee-saved register, then there are unnecessary push/pop in
> pro/epilogue.
>
> the reason comes from the following pattern:
>
> (define_insn "tb<optab><mode>1"
> (define_insn "cb<optab><mode>1"
>
> they always declare "(clobber (match_scratch:DI 3 "=r"))" while that
> register is
> used only when "get_attr_length (insn) == 8".
>
> actually, we could clobber CC register instead of scratch register to
> avoid wasting
> of general purpose registers.
>
> this patch fix this, and give slightly improvement on spec2k.
> bootstrap OK, no regression on aarch64 bare-metal.
>
> ok for trunk?
>
> the testcase included in the patch is for verification purpose only.
> it could verify the long branch situation, while because of the code is
> very big,
> it takes a couple of seconds to compile. will not commit it.
>
> gcc/
>     2014-12-15 Ramana Radhakrishnan ramana.radhakrishnan@arm.com
>               Jiong Wang jiong.wang@arm.com
>
>     * config/aarch64/aarch64.md (tb<optab><mode>1): Clobber CC reg
> instead of scratch reg.
>     (cb<optab><mode>1): Likewise.
>     * config/aarch64/iterators.md (bcond): New define_code_attr.

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