[PATCH/AARCH64] Disable load/store pair peephole for volatile mem

[Marcus Shawcroft]

On 10 December 2014 at 02:18, Andrew Pinski <pinskia@gmail.com> wrote:
> Hi,
>   As mentioned in
> https://gcc.gnu.org/ml/gcc-patches/2014-12/msg00609.html, the
> load/store pair peepholes currently accept volatile mem which can
> cause wrong code as the architecture does not define which part of the
> pair happens first.
>
> This patch disables the peephole for volatile mem and adds two
> testcases so that volatile loads are not converted into load pair (I
> could add the same for store pair if needed).  In the second testcase,
> only f3 does not get converted to load pair, even though the order of
> the loads are different.
>
> OK?  Bootstrapped and tested on aarch64-linux-gnu without any regressions.
>
> Thanks,
> Andrew Pinski
>
> ChangeLog:
> * config/aarch64/aarch64.c (aarch64_operands_ok_for_ldpstp): Reject
> volatile mems.
> (aarch64_operands_adjust_ok_for_ldpstp): Likewise.
>
> testsuite/ChangeLog:
> * gcc.target/aarch64/volatileloadpair-1.c: New testcase.
> * gcc.target/aarch64/volatileloadpair-2.c: New testcase.


OK.

Bin, Feel free to follow up with a patch to reorg the MEM_P

/Marcus