[PATCH][rtlanal.c][BE][1/2] Fix vector load/stores to not use ld1/st1

[Jeff Law]

On 12/12/14 04:07, Alan Hayward wrote:
> [Cleaning this thread up to submit patch again, with better explanation]
>
> This patch causes subreg_get_info() to exit early in the simple cases
> where we are extracting a whole register from a multi register.
>
> In aarch64 for Big Endian we were producing a subreg of a OImode (256bits)
> from a CImode (384bits) This would hit the following assert in
> subreg_get_info:
>
> gcc_assert ((GET_MODE_SIZE (xmode) % GET_MODE_SIZE (ymode)) == 0);
>
>
> This is a rule we should be able to relax a little - if the subreg we want
> fits into a whole register then this is a valid result and can be easily
> detected earlier in the function.
>
> This has the bonus that we should be slightly reducing the execution time
> for more common cases, for example a subreg of 64bits from 256bits.
>
> This patch is required for the second part of the patch, which is aarch64
> specific, and fixes up aarch64 Big Endian movoi/ci/xi. This second part
> has already been approved.
>
> This patch will apply cleanly by itself and no regressions were seen when
> testing aarch64 and x86_64 on make check.
>
> Cheers,
> Alan
>
>
> Changelog:
>
> 2014-11-14  Alan Hayward  <alan.hayward@arm.com>
>
>          * rtlanal.c
>          (subreg_get_info): Exit early for simple and common cases
ChangeLog nit.  Should be:

	* rtlanal.c (subreg_get_info): Exit early for simple and common
	cases.

With ChangeLog fixed, this patch is OK for the trunk.


If you have a testcase, please submit it as well.

Thanks for your patience,
Jeff