[PATCH/expand] PR64011 Adjust bitsize when partial overflow happen for big-endian

[Jeff Law]

On 12/30/14 03:21, Jiong Wang wrote:
> PR64011 is actually a general problem on all target support bit insertion
> instructions.
>
> we overflow check at the start of store_bit_field_1, but that only check
> the
> situation where the field lies completely outside the register, while
> there do
> have situation where the field lies partly in the register, we need to
> adjust
> bitsize for this partial overflow situation. Without this fix,
> pr48335-2.c on
> big-endian will broken on those arch support bit insert instruction,
> like arm, aarch64.
>
> the testcase is just pr48335-2.c, before this patch is will ICE on arm
> and =
> generate
> invalid assembly on AArch64. after this patch, problem gone away.
>
> ok for trunk?
>
> bootstrap OK on x86-64 && aarch64.
> no regression on x86-64
>
> thanks.
>
> gcc/
>     PR64011
>     * expmed.c (store_bit_field_using_insv): Adjust bitsize when there
> is partial overflow.
Why adjust here the size of the stored field?  Doesn't this end up 
storing less information?

If those bits are still within the object, even if the object is by some 
means living in a mixture of registers and memory, then don't we need to 
set them all?

If those bits are outside the object, then isn't the source simply 
broken because it's writing data outside the bounds of the given object?

Am I  missing something here?

jeff