[PATCH] Remove inefficient branchless conditional negate optimization

Jeff Law law@redhat.com
Thu Feb 26 22:48:00 GMT 2015


On 02/26/15 10:30, Wilco Dijkstra wrote:
> Several GCC versions ago a conditional negate optimization was introduced as a workaround for
> PR45685. However the branchless expansion for conditional negate is extremely inefficient on most
> targets (5 sequentially dependent instructions rather than 2 on AArch64). Since the underlying issue
> has been resolved (the example in PR45685 no longer generates a branch on x64), remove the
> workaround so that conditional negates are treated in exactly the same way as conditional invert,
> add, subtract, and, orr, xor etc. Simple example:
>
> int f(int x) { if (x > 3) x = -x; return x; }
You need to bootstrap and regression test the change before it can be 
approved.

You should turn this little example into a testcase.  It's fine with me 
if this new test is ARM specific.


You should also find a way to change the test gcc.dg/tree-ssa/pr45685.c 
in such a way that it ensures there aren't any undesirable branches.

I've got enough history to know this is fixing a regression of sorts for 
the ARM platform.  So once the issues above are addressed it can go 
forward even without a BZ noting the regression.

jeff



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