[PATCH, 2/2][ARM]: New CPU support for Marvell Whitney

[Maxim Kuvyrkov]

> On Feb 26, 2015, at 10:42 AM, Xingxing Pan <xxingpan@marvell.com> wrote:
...
> Expand several arm types.
> 
> 2015-02-26  Xingxing Pan  <xxingpan@marvell.com>
> 
>     * config/arm/types.md:
>     (neon_logic): Expand to neon_logic_reg and neon_logic_imm.
>     (neon_logic_q): Expand to neon_logic_reg_q and neon_logic_imm_q.
>     (neon_from_gp): Expand to neon_from_gp and neon_from_gp_scalar.
>     (neon_from_gp_q): Expand to neon_from_gp_q and neon_from_gp_scalar_q.
>     (neon_to_gp): Expand to neon_to_gp and neon_to_gp_scalar.
>     (neon_to_gp_q): Expand to neon_to_gp_q and neon_to_gp_scalar_q.
>     * config/aarch64/aarch64-simd.md: Ditto.
>     * config/aarch64/aarch64.md: Ditto.
>     * config/aarch64/thunderx.md: Ditto.
>     * config/arm/arm.md: Ditto.
>     * config/arm/cortex-a15-neon.md: Ditto.
>     * config/arm/cortex-a17-neon.md: Ditto.
>     * config/arm/cortex-a57.md: Ditto.
>     * config/arm/cortex-a8-neon.md: Ditto.
>     * config/arm/cortex-a9-neon.md: Ditto.
>     * config/arm/marvell-whitney.md: Ditto.
>     * config/arm/neon.md: Ditto.
>     * config/arm/xgene1.md: Ditto.

I think you are going overkill with this approach.  Instead of encoding operand types in <INSN_TYPE>_<OPERAND_TYPE> values, it seems simpler to add a new operand_type attribute and set it on affected insns.

(define_attr "op_type" "imm,reg,scalar,other" (const_string "other))

then in define_insn (example from first hunk of your patch):

   [(set_attr "type" "neon_load1_1reg<q>, neon_store1_1reg<q>,\
                      neon_logic<q>, neon_to_gp<q>, neon_from_gp<q>,\
                      mov_reg, neon_move<q>")
    (set_attr "op_type" "*,               *,\
                      reg,           scalar,        scalar,\
                      *, *")]

and then in define_insn_reservation:

--- a/gcc/config/arm/marvell-whitney.md
+++ b/gcc/config/arm/marvell-whitney.md
@@ -170,7 +170,7 @@
                            (const_string "wTP41")
           (eq_attr "type" "neon_permute_q,neon_zip_q")
                            (const_string "wTP42")
           (eq_attr "type" "neon_bsl")
                            (const_string "wTP43")
           (and (eq_attr "type" "neon_logic")
                (eq_attr "op_type" "imm"))
                            (const_string "wTP43")
           (eq_attr "type" "neon_arith_acc,neon_shift_acc")
                           (if_then_else (match_test

The point of this is that definitions of many architectures that don't care about operand type don't need to change.

--
Maxim Kuvyrkov
www.linaro.org