[AArch64] Tighten predicates on SIMD shift intrinsics

James Greenhalgh james.greenhalgh@arm.com
Thu Sep 25 15:05:00 GMT 2014


On Fri, Sep 19, 2014 at 05:57:06PM +0100, Richard Henderson wrote:
> On 09/11/2014 01:29 AM, James Greenhalgh wrote:
> > +;; Predicates used by the various SIMD shift operations.  These
> > +;; fall in to 3 categories.
> > +;;   Shifts with a range 0-(bit_size - 1) (aarch64_simd_shift_imm)
> > +;;   Shifts with a range 1-bit_size (aarch64_simd_shift_imm_offset)
> > +;;   Shifts with a range 0-bit_size (aarch64_simd_shift_imm_bitsize)
> > +(define_predicate "aarch64_simd_shift_imm_qi"
> > +  (and (match_code "const_int")
> > +       (match_test "aarch64_simd_const_bounds (op, 0, 7)")))
>
> The function call should be removed and this should be written as
>
>   (match_test "IN_RANGE (ival, 0, 7)")
>

Quite right, updated as attached.

Cross-tested for aarch64-none-elf with no issues.

OK?

Thanks,
James

---
gcc/

2014-09-25  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-protos.h (aarch64_simd_const_bounds): Delete.
	* config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shl<mode>): Use
	new predicates.
	(aarch64_<sur>shll2_n<mode>): Likewise.
	(aarch64_<sur>shr_n<mode>): Likewise.
	(aarch64_<sur>sra_n<mode>: Likewise.
	(aarch64_<sur>s<lr>i_n<mode>): Likewise.
	(aarch64_<sur>qshl<u>_n<mode>): Likewise.
	* config/aarch64/aarch64.c (aarch64_simd_const_bounds): Delete.
	* config/aarch64/iterators.md (ve_mode): New.
	(offsetlr): Remap to infix text for use in new predicates.
	* config/aarch64/predicates.md (aarch64_simd_shift_imm_qi): New.
	(aarch64_simd_shift_imm_hi): Likewise.
	(aarch64_simd_shift_imm_si): Likewise.
	(aarch64_simd_shift_imm_di): Likewise.
	(aarch64_simd_shift_imm_offset_qi): Likewise.
	(aarch64_simd_shift_imm_offset_hi): Likewise.
	(aarch64_simd_shift_imm_offset_si): Likewise.
	(aarch64_simd_shift_imm_offset_di): Likewise.
	(aarch64_simd_shift_imm_bitsize_qi): Likewise.
	(aarch64_simd_shift_imm_bitsize_hi): Likewise.
	(aarch64_simd_shift_imm_bitsize_si): Likewise.
	(aarch64_simd_shift_imm_bitsize_di): Likewise.

gcc/testsuite/

2014-09-25  James Greenhalgh  <james.greenhalgh@arm.com>

	* gcc.target/aarch64/simd/vqshlb_1.c: New.
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