[PATCH][ARM] Fix insn type of movmisalign neon load pattern

Richard Earnshaw rearnsha@arm.com
Thu Sep 18 10:02:00 GMT 2014


On 18/09/14 11:01, Kyrill Tkachov wrote:
> Hi all,
> 
> While browsing the code I noticed that the pattern in the patch has a 
> store type when it is really a vld1 operation. Looking at the patterns 
> around it, I think it was just a copy-pasto.
> 
> The patch corrects that.
> 
> Tested arm-none-eabi.
> 
> Ok for trunk?
> 
> 2014-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> 
>      * config/arm/neon.md (*movmisalign<mode>_neon_load): Change type
>      to neon_load1_1reg<q>.
> 
> 
> arm-movmisalign-type.patch
> 
> 
> diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
> index 354a105..69b7cfa 100644
> --- a/gcc/config/arm/neon.md
> +++ b/gcc/config/arm/neon.md
> @@ -296,7 +296,7 @@ (define_insn "*movmisalign<mode>_neon_load"
>  		    UNSPEC_MISALIGNED_ACCESS))]
>    "TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access"
>    "vld1.<V_sz_elem>\t{%q0}, %A1"
> -  [(set_attr "type" "neon_store1_1reg<q>")])
> +  [(set_attr "type" "neon_load1_1reg<q>")])
>  
>  (define_insn "vec_set<mode>_internal"
>    [(set (match_operand:VD 0 "s_register_operand" "=w,w")
> 

OK.

R.




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