[PATCH 2/2][AArch64] Replace temporary inline assembler for vset_lane

Alan Lawrence alan.lawrence@arm.com
Mon Sep 8 16:39:00 GMT 2014

The vset(q?)_lane_XXX intrinsics are presently implemented using inline asm 
blocks containing "ins" instructions - which are opaque to the mid-end. This 
patch replaces them with simple writes using gcc vector extension operations, 
with a lane-flip on bigendian (where ARM intrinsic lanes are indexed the other 
way around to gcc vector extensions). This should enable more optimization by 
being transparent to the mid-end.

No significant changes to assembly output for vset_lane_1.c test from previous 

Tested with check-gcc on aarch64-none-elf and aarch64_be-none-elf, including 
vset_lane_1.c test from previous patch.


	* config/aarch64/arm_neon.h (aarch64_vset_lane_any): New (*2).
	(vset_lane_f32, vset_lane_f64, vset_lane_p8, vset_lane_p16,
	vset_lane_s8, vset_lane_s16, vset_lane_s32, vset_lane_s64,
	vset_lane_u8, vset_lane_u16, vset_lane_u32, vset_lane_u64,
	vsetq_lane_f32, vsetq_lane_f64, vsetq_lane_p8, vsetq_lane_p16,
	vsetq_lane_s8, vsetq_lane_s16, vsetq_lane_s32, vsetq_lane_s64,
	vsetq_lane_u8, vsetq_lane_u16, vsetq_lane_u32, vsetq_lane_u64):
	Replace inline assembler with __aarch64_vset_lane_any.

OK for trunk?

Alan Lawrence wrote:
> This adds a test thath checks the result of a vset_lane intrinsic is identical 
> to the input apart from one value being changed.
> Test checks only one index per vset_lane_xxx in a somewhat adhoc fashion as the 
> index has to be a compile-time immediate and I felt that doing a loop using 
> macros did not add enough to justify the complexity.
> Passing on aarch64-none-elf and aarch64_be-none-elf (cross-tested).
> gcc/testsuite/ChangeLog:
> 	gcc.target/aarch64/vset_lane_1.c: New test.
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