[AArch64/ARM 2/3] Recognize shuffle patterns for REV instructions on AArch64, rewrite intrinsics.

[Alan Lawrence]

Sure, here is a revised patch (replacing a with __a). I've retested (the various 
TBL dependencies have all been committed), no regressions on aarch64-none-elf or 
aarch64_be-none-elf. May I propose gcc/ChangeLog:

2014-05-15  Alan Lawrence  <alan.lawrence@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
	New pattern.
	* config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
	(aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
	* config/aarch64/iterators.md (REVERSE): New iterator.
	(UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
	(rev_op): New int_attribute.
	* config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
	vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
	vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
	vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
	vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
	vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
	vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
	Replace temporary __asm__ with __builtin_shuffle.

Cheers, Alan

Marcus Shawcroft wrote:

> On 23 April 2014 20:44, Alan Lawrence <alan.lawrence@arm.com> wrote:
>> This patch (borrowing heavily from the ARM backend) makes
>> aarch64_expand_vec_perm_const output REV instructions when appropriate,
>> and then implements the vrev_XXX intrinsics in terms of __builtin_shuffle
>> (which
>> now produces the same assembly instructions).
>>
>> No regressions (and tests in previous patch
>> http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01468.html still passing) on
>> aarch64-none-elf; also on aarch64_be-none-elf, where there are
>> no regressions following testsuite config changes in
>> http://gcc.gnu.org/ml/gcc-patches/2014-04/msg00579.html, but some "noise"
>> (due
>> to unexpected success in vectorization) without that patch.
>>
>> gcc/ChangeLog:
>> 2014-04-23  Alan Lawrence  <alan.lawrence@arm.com>
> 
> Two spaces after the date.
> 
>>         * config/aarch64/iterators.md: add a REVERSE iterator and rev_op
>>         attribute for REV64/32/16 insns.
> 
> ChangeLog entries are sentences, therefore they start with a capital letter.
> 
> Identify the new definitions in parentheses.  The ChangeLog entry just
> states what changed, not why, any explanation required should be in
> code comments or in the submission email, therefore:
> 
>          * config/aarch64/iterators.md (REVERSE, rev_op): Define.
> 
> 
>>         * config/aarch64/aarch64-simd.md: add corresponding define_insn
>>         parameterized by REVERSE iterator.
> 
> ... and this one should read something like:
> 
>          * config/aarch64/aarch64-simd.md
>            (aarch64_rev<REVERSE:rev_op><mode>): Define.
> 
> The remaining entries should all be updated in a similar fashion...
> 
> 
>> +
>> +/* vrev  */
>> +
>> +__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
>> +vrev16_p8 (poly8x8_t a)
>> +{
>> +  return __builtin_shuffle (a, (uint8x8_t) { 1, 0, 3, 2, 5, 4, 7, 6 });
>> +}
> 
> This has the effect of reserving the symbol 'a', use __a instead.  We
> have other breakage like this in arm_neon.h which needs fixing but
> that aside we should not be compounding the problem.
> 
> Cheers
> /Marcus
> 
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