[PATCH][ARM/AArch64][2/2] Crypto intrinsics tuning for Cortex-A53 - pipeline description

Richard Biener rguenther@suse.de
Fri Mar 28 15:07:00 GMT 2014


On Fri, 28 Mar 2014, Ramana Radhakrishnan wrote:

> On Tue, Mar 25, 2014 at 3:52 PM, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
> > Hi all,
> >
> > In ARMv8-A there's a general expectation that AESE/AESMC and AESD/AESIMC
> > sequences of the form:
> >
> > AESE Vn, _
> > AESMC Vn, Vn
> >
> > will issue both instructions in a single cycle on super-scalar
> > implementations. It would be nice to model that in our pipeline
> > descriptions. This patch defines a function to detect such pairs and uses it
> > in the pipeline description for these instructions for the Cortex-A53.
> >
> > The patch also adds some missed AdvancedSIMD information to the pipeline
> > description for the Cortex-A53.
> >
> > Bootstrapped and tested on arm-none-linux-gnueabihf and
> > aarch64-none-linux-gnu.
> >
> > Cortex-A53 scheduling is the default scheduling description on aarch64 so
> > this patch can change default behaviour. That's an argument for taking this
> > in stage1 or maybe backporting it into 4.9.1 once the release is made.
> 
> 
> To my mind on ARM / AArch64 this actually helps anyone using the
> crypto intrinsics on A53 hardware today and it would be good to get
> this into 4.9. Again I perceive this as low risk on ARM (AArch32) as
> this is not a  default tuning option for any large software vendors,
> the folks using this are typically the ones that write the more
> specialized crypto intrinsics rather than just general purpose code.
> However this will help with scheduling on what is essentially an
> in-order core, so would be nice to have.
> 
> This would definitely need approval from the AArch64 maintainers and
> the RMs to go in at this stage.
> 
> If not, we should consider this for 4.9.1

I'd rather have it in 4.9.0 than 4.9.1.

Richard.

> regards
> Ramana
> 
> >
> > What do people think?
> >
> > Thanks,
> > Kyrill
> >
> >
> > 2014-03-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> >
> >     * config/arm/aarch-common.c (aarch_crypto_can_dual_issue): New function.
> >     * config/arm/aarch-common-protos.h (aarch_crypto_can_dual_issue):
> > Declare
> >     extern.
> >     * config/arm/cortex-a53.md: Add reservations and bypass for crypto
> >     instructions as well as AdvancedSIMD loads.
> 
> 

-- 
Richard Biener <rguenther@suse.de>
SUSE / SUSE Labs
SUSE LINUX Products GmbH - Nuernberg - AG Nuernberg - HRB 16746
GF: Jeff Hawn, Jennifer Guild, Felix Imend"orffer



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