[PATCH] Add support for powerpc ISA 2.07 128-bit add/subtract builtins

[David Edelsohn]

On Wed, Mar 5, 2014 at 3:57 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> This patch adds support for the PowerPC ISA 2.07 (power8) 128-bit add/subtract
> instructions that use the Altivec (VMX) register set (vaddumq, etc.).
>
> Unfortunately at the moment, TImode (__int128_t) is not allowed to use the
> VSX/VMX register set, unless you use the undocumented switch -mvsx-timode.
> This was disabled because there were several bugs that showed up during the
> original ISA 2.07 patches.  I spent some time trying to work out all of the
> problems with -mvsx-timode, but I was not able to do so at present.
>
> These patches add support for the builtins when the code is running in 64-bit
> mode.  If TImode is not allowed to go into the VMX registers, the code uses
> V2DImode to do the operation.  Simple minded tests show that the compiler can
> do loads directly into the VMX registers, but after the operation, it does a
> permute, 2 direct move instructions, and a store quad from the GPR register
> set.  Ideally, a future patch will fix -mvsx-timode so it can be default.
>
> In these patches, I updated test timode_off.c.  This test would fail if
> -mvsx-timode is enabled because in that mode, TImode addresses can only be a
> single register, so that the address can be used either to load GPRs or VSX
> registers without reloading.  This causes the test code to be slightly bigger,
> and the test then fails when the code size gets to be larger than 616 bytes.
>
> I have tested these patches on power7 and power8 machines with no regressions.
> I have tested the executable test on both big endian and little endian power8
> systems, and it produces the correct values in both cases.  Are the patches ok
> to install?
>
> [gcc]
> 2014-03-05  Michael Meissner  <meissner@linux.vnet.ibm.com>
>
>         * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
>         Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm,
>         vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding
>         128-bit integer add/subtract to ISA 2.07.
>
>         * config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add new
>         declaration.
>         (rs6000_split_128bit_ok_p): Likewise.
>         (rs6000_int128_builtin_fixup): Likewise.
>
>         * gcc/config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new
>         macros to support adding ISA 2.07 3 argument builtins.
>         (BU_P8V_OVERLOAD_3): Likewise.
>         (VADDCUQ): Add ISA 2.07 builtins to support 128-bit integer
>         add/subtract instructions, both as a normal builtin, and as an
>         overloaded builtin.
>         (VADDUQM): Likewise.
>         (VSUBCUQ): Likewise.
>         (VSUBUQM): Likewise.
>         (VADDECUQ): Likewise.
>         (VADDECUQ): Likewise.
>         (VSUBECUQ): Likewise.
>         (VSUBEUQM): Likewise.
>
>         * gcc/config/rs6000-c.c (altivec_overloaded_builtins): Add support
>         for ISA 2.07 overloaded builtins to do 128-bit add and subtract.
>
>         * gcc/config/rs6000.c (rs6000_init_builtins): Initialize state
>         variables for using __int128_t and __uint128_t as arguments to
>         builtins.
>         (rs6000_move_128bit_ok_p): New function to validate TImode/PTImode
>         moves.
>         (rs6000_split_128bit_ok_p): New function to say when it is ok to
>         split TImode/PTImove moves.
>         (rs6000_int128_builtin_fixup): New function to convert int 128-bit
>         add/subtract from using TImode to using V2DImode to allow use of
>         the ISA 2.07 builtins when TImode is not allowed in VSX
>         registers.
>
>         * gcc/config/rs6000/rs6000.h (enum rs6000_builtin_type_index): Add
>         support to allow __int128_t and __uint128_t types as builtin
>         arguments.
>         (intTI_type_internal_node): Likewise.
>         (uintTI_type_internal_node): Likewise.
>
>         * gcc/config/rs6000/altivec.md (UNSPEC_VADDUQM): New unspec
>         literals to allow addition of the ISA 2.07 128-bit add/subtract
>         builtin functions.
>         (UNSPEC_VADDCUQ): Likewise.
>         (UNSPEC_VADDEUQM): Likewise.
>         (UNSPEC_VADDECUQ): Likewise.
>         (UNSPEC_VSUBUQM): Likewise.
>         (UNSPEC_VSUBCUQ): Likewise.
>         (UNSPEC_VSUBEUQM): Likewise.
>         (UNSPEC_VSUBECUQ): Likewise.
>         (VINT128): New iterator for 128-bit add/subtract builtins.
>         (altivec_vadduqm): New ISA 2.07 128-bit add/subtract builtins.
>         (altivec_vadduqm_<mode>): Likewise.
>         (altivec_vaddcuq): Likewise.
>         (altivec_vaddcuq_<mode>): Likewise.
>         (altivec_vaddeuqm): Likewise.
>         (altivec_vaddeuqm_<mode>): Likewise.
>         (altivec_vaddecuq): Likewise.
>         (altivec_vaddecuq_<mode>): Likewise.
>         (altivec_vsubuqm): Likewise.
>         (altivec_vsubuqm_<mode>): Likewise.
>         (altivec_vsubcuq): Likewise.
>         (altivec_vsubcuq_<mode>): Likewise.
>         (altivec_vsubeuqm): Likewise.
>         (altivec_vsubeuqm_<mode>): Likewise.
>         (altivec_vsubecuq): Likewise.
>         (altivec_vsubecuq_<mode>): Likewise.
>
>         * gcc/config/rs6000/altivec.h (vec_vadduqm): If ISA 2.07, add
>         support for 128-bit add/subtract builtins.
>         (vec_vaddcuq): Likewise.
>         (vec_vaddeuqm): Likewise.
>         (vec_vaddecuq): Likewise.
>         (vec_vsubuqm): Likewise.
>         (vec_vsubcuq): Likewise.
>         (vec_vsubeuqm): Likewise.
>         (vec_vsubecuq): Likewise.
>
> [gcc/testsuite]
> 2014-03-05  Michael Meissner  <meissner@linux.vnet.ibm.com>
>
>         * gcc.target/powerpc/p8vector-int128-1.c: New file to test ISA
>         2.07 128-bit add/subtract builtins.
>         * gcc.target/powerpc/p8vector-int128-2.c: Likewise.
>
>         * gcc.target/powerpc/timode_off.c: Restrict cpu type to power5,
>         due to when TImode is allowed in VSX registers, the allowable
>         address modes for TImode is just a single indirect address in
>         order for the value to be loaded and store in either GPR or VSX
>         registers.  This affects the generated code, and it would cause
>         this test to fail, when such an option is used.

Okay.

Thanks, David