[PATCH][ARM][doc] Improve description of AArch32 CRC32 intrinsics

Richard Earnshaw rearnsha@arm.com
Tue Jun 10 09:37:00 GMT 2014


On 09/06/14 11:06, Kyrill Tkachov wrote:
> Hi all,
> 
> The ACLE intrinsics documentation for arm can be improved a bit.
> 
> Since there are potentially other ACLE intrinsics besides the CRC32 ones 
> in the future, I moved the comment about their availability into the 
> CRC32 intrinsics subsection.
> 
> I removed the comment about the instruction form expected for AArch64 
> since that is a separate port and should be documented in the AArch64 
> section.
> 
> Tested by building the PDF doc and looking at it.
> 
> I think this should go for 4.9 as well as trunk as it is a clarification.
> 
> Ok?
> 

Ok both.

R.

> Thanks,
> Kyrill
> 
> 
> 2014-06-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> 
>      * doc/arm-acle-intrinsics.texi: Specify when CRC32 intrinsics are
>      available.
>      Simplify description of __crc32d and __crc32cd intrinsics.
>      * doc/extend.texi (ARM ACLE Intrinsics): Remove comment about CRC32
>      availability.
> 
> 
> arm-crc-doc-fix.patch
> 
> 
> diff --git a/gcc/doc/arm-acle-intrinsics.texi b/gcc/doc/arm-acle-intrinsics.texi
> index e68f4cd..8c5523e 100644
> --- a/gcc/doc/arm-acle-intrinsics.texi
> +++ b/gcc/doc/arm-acle-intrinsics.texi
> @@ -4,6 +4,10 @@
>  
>  @subsubsection CRC32 intrinsics
>  
> +These intrinsics are available when the CRC32 architecture extension is
> +specified, e.g. when the @option{-march=armv8-a+crc} switch is used, or when
> +the target processor specified with @option{-mcpu} supports it.
> +
>  @itemize @bullet
>  @item uint32_t __crc32b (uint32_t, uint8_t)
>  @*@emph{Form of expected instruction(s):} @code{crc32b @var{r0}, @var{r0}, @var{r0}}
> @@ -25,8 +29,7 @@
>  @itemize @bullet
>  @item uint32_t __crc32d (uint32_t, uint64_t)
>  @*@emph{Form of expected instruction(s):} Two @code{crc32w @var{r0}, @var{r0}, @var{r0}}
> -instructions for AArch32. One @code{crc32w @var{w0}, @var{w0}, @var{x0}} instruction for
> -AArch64.
> +instructions.
>  @end itemize
>  
>  @itemize @bullet
> @@ -50,6 +53,5 @@ AArch64.
>  @itemize @bullet
>  @item uint32_t __crc32cd (uint32_t, uint64_t)
>  @*@emph{Form of expected instruction(s):} Two @code{crc32cw @var{r0}, @var{r0}, @var{r0}}
> -instructions for AArch32. One @code{crc32cw @var{w0}, @var{w0}, @var{x0}} instruction for
> -AArch64.
> +instructions.
>  @end itemize
> diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
> index a2fe619..a68020a 100644
> --- a/gcc/doc/extend.texi
> +++ b/gcc/doc/extend.texi
> @@ -10519,9 +10519,6 @@ when the @option{-mfpu=neon} switch is used:
>  @node ARM ACLE Intrinsics
>  @subsection ARM ACLE Intrinsics
>  
> -These built-in intrinsics for the ARMv8-A CRC32 extension are available when
> -the @option{-march=armv8-a+crc} switch is used:
> -
>  @include arm-acle-intrinsics.texi
>  
>  @node AVR Built-in Functions
> 




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