PATCH: PR target/59672: Add -m16 support for x86

H.J. Lu hjl.tools@gmail.com
Tue Jan 28 16:29:00 GMT 2014


On Tue, Jan 28, 2014 at 8:01 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Mon, Jan 27, 2014 at 8:44 PM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>
>> The .code16gcc directive was added to binutils back in 1999:
>>
>> ---
>>    '.code16gcc' provides experimental support for generating 16-bit code
>> from gcc, and differs from '.code16' in that 'call', 'ret', 'enter',
>> 'leave', 'push', 'pop', 'pusha', 'popa', 'pushf', and 'popf'
>> instructions default to 32-bit size.  This is so that the stack pointer
>> is manipulated in the same way over function calls, allowing access to
>> function parameters at the same stack offsets as in 32-bit mode.
>> '.code16gcc' also automatically adds address size prefixes where
>> necessary to use the 32-bit addressing modes that gcc generates.
>> ---
>>
>> It encodes 32-bit assembly instructions generated by GCC in 16-bit format
>>  so that GCC can be used to generate 16-bit instructions.  To do that, the
>>  .code16gcc directive may be placed at the very beginning of the assembly
>>  code.  This patch adds -m16 to x86 backend by:
>>
>> 1. Add -m16 and make it mutually exclusive with -m32, -m64 and -mx32.
>> 2. Treat -m16 like -m32 so that --32 is passed to assembler.
>> 3. Output .code16gcc at the very beginning of the assembly code.
>> 4. Turn off 64-bit ISA when -m16 is used.
>>
>> Tested on Linux/x86 and Linux/x86-64.  OK for trunk?
>>
>> Thanks.
>>
>> H.J.
>> ---
>>         PR target/59672
>>         * config/i386/gnu-user64.h (SPEC_32): Add "m16|" to "m32".
>>         (SPEC_X32): Likewise.
>>         (SPEC_64): Likewise.
>>         * config/i386/i386.c (ix86_option_override_internal): Turn off
>>         OPTION_MASK_ISA_64BIT, OPTION_MASK_ABI_X32 and OPTION_MASK_ABI_64
>>         for TARGET_16BIT.
>>         (x86_file_start): Output .code16gcc for TARGET_16BIT.
>>         * config/i386/i386.h (TARGET_16BIT): New macro.
>>         (TARGET_16BIT_P): Likewise.
>>         * config/i386/i386.opt: Add m16.
>>         * doc/invoke.texi: Document -m16.
>
> OK for mainline, needs OK from RMs for a backport.

Checked in.

> Please also add the entry to Changes.html, this is user-visible change.
>

Here is the patch for changes.html.  OK to install?

Thanks.

-- 
H.J.
---
Index: changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.9/changes.html,v
retrieving revision 1.53
diff -u -p -r1.53 changes.html
--- changes.html 21 Jan 2014 08:34:06 -0000 1.53
+++ changes.html 28 Jan 2014 16:26:19 -0000
@@ -415,6 +415,9 @@ auto incr = [](auto x) { return x++; };
       well on the most current Intel processors, which are Haswell
       and Silvermont for GCC 4.9.
     </li>
+    <li>Support to encode 32-bit assembly instructions in 16-bit format
+      is now available through the <code>-m16</code> option.
+    </li>
     <li>Better inlining of <code>memcpy</code> and <code>memset</code>
  that is aware of value ranges and produces shorter alignment prologues.
     </li>



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