[PATCH AArch64_BE 1/4] Big-Endian lane numbering fix

Alex Velenko Alex.Velenko@arm.com
Thu Jan 16 11:49:00 GMT 2014


Hi,
This patch is the first patch in a series of patches fixing Big-Endian
lane numbering. The goal of this series of patches is to make proper
bridge between pure GCC big-endian view on lane numbering and internal
architected view.

Approach taken is to catch lane indexing when internal vector lane
indexes are passed to GCC lane indexing world view.

This will have a short-term impact on big-endian NEON intrinsics and
introduces a number of regressions. But this is the correct thing to do
to ensure that auto-vectorized and GCC vector extension code works
correctly.

This particular patch fixes vld1_<type> and vst1_<type> to generate st1 
and ld1 instructions, correcting their BE behaviour.

Regression tested on aarch64-none-elf and aarch64_be-none-elf with 
recent vec-perm with no unexpected issues.

Is it okay for trunk?

Regards,
Alex Velenko



gcc/
2014-01-16  Alex Velenko  <Alex.Velenko@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_be_ld1<mode>):
	New define_insn.
	(aarch64_be_st1<mode>): Likewise.
	(aarch_ld1<VALL:mode>): Define_expand modified.
	(aarch_st1<VALL:mode>): Likewise.
	* config/aarch64/aarch64.md (UNSPEC_LD1): New unspec definition.
	(UNSPEC_ST1): Likewise

gcc/testsuite
2014-01-16  Alex Velenko  <Alex.Velenko@arm.com>

	* /gcc.target/aarch64/vld1-vst1_1.c: New test_case.
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