[PATCH 092/236] lra: use rtx_insn
David Malcolm
dmalcolm@redhat.com
Wed Aug 6 17:20:00 GMT 2014
gcc/
* lra-int.h (struct lra_insn_recog_data): Strengthen field "insn"
from rtx to rtx_insn *.
(lra_push_insn): Likewise for 1st param.
(lra_push_insn_and_update_insn_regno_info): Likewise.
(lra_pop_insn): Likewise for return type.
(lra_invalidate_insn_data): Likewise for 1st param.
(lra_set_insn_deleted): Likewise.
(lra_delete_dead_insn): Likewise.
(lra_process_new_insns): Likewise for first 3 params.
(lra_set_insn_recog_data): Likewise for 1st param.
(lra_update_insn_recog_data): Likewise.
(lra_set_used_insn_alternative): Likewise.
(lra_invalidate_insn_regno_info): Likewise.
(lra_update_insn_regno_info): Likewise.
(lra_former_scratch_operand_p): Likewise.
(lra_eliminate_regs_1): Likewise.
(lra_get_insn_recog_data): Likewise.
* lra-assigns.c (assign_by_spills): Strengthen local "insn" from
rtx to rtx_insn *.
* lra-coalesce.c (move_freq_compare_func): Likewise for locals
"mv1" and "mv2".
(substitute_within_insn): New.
(lra_coalesce): Strengthen locals "mv", "insn", "next" from rtx to
rtx_insn *. Strengthen sorted_moves from rtx * to rxt_insn **.
Replace call to "substitute" with call to substitute_within_insn.
* lra-constraints.c (curr_insn): Strengthen from rtx to
rtx_insn *.
(get_equiv_with_elimination): Likewise for param "insn".
(match_reload): Strengthen params "before" and "after" from rtx *
to rtx_insn **.
(emit_spill_move): Likewise for return type. Add a checked cast
to rtx_insn * on result of gen_move_insn for now.
(check_and_process_move): Likewise for local "before". Replace
NULL_RTX with NULL when referring to insns.
(process_addr_reg): Strengthen params "before" and "after" from
rtx * to rtx_insn **.
(insert_move_for_subreg): Likewise.
(simplify_operand_subreg): Strengthen locals "before" and "after"
from rtx to rtx_insn *.
(process_address_1): Strengthen params "before" and "after" from
rtx * to rtx_insn **. Strengthen locals "insns", "last_insn" from
rtx to rtx_insn *.
(process_address): Strengthen params "before" and "after" from
rtx * to rtx_insn **.
(emit_inc): Strengthen local "last" from rtx to rtx_insn *.
(curr_insn_transform): Strengthen locals "before" and "after"
from rtx to rtx_insn *. Replace NULL_RTX with NULL when referring
to insns.
(loc_equivalence_callback): Update cast of "data", changing
resulting type from rtx to rtx_insn *.
(substitute_pseudo_within_insn): New.
(inherit_reload_reg): Strengthen param "insn" from rtx to
rtx_insn *; likewise for local "new_insns". Replace NULL_RTX with
NULL when referring to insns. Add a checked cast to rtx_insn *
when using usage_insn to invoke lra_update_insn_regno_info.
(split_reg): Strengthen param "insn" from rtx to rtx_insn *;
likewise for locals "restore", "save". Add checked casts to
rtx_insn * when using usage_insn to invoke
lra_update_insn_regno_info and lra_process_new_insns. Replace
NULL_RTX with NULL when referring to insns.
(split_if_necessary): Strengthen param "insn" from rtx to
rtx_insn *.
(update_ebb_live_info): Likewise for params "head", "tail" and local
"prev_insn".
(get_last_insertion_point): Likewise for return type and local "insn".
(get_live_on_other_edges): Likewise for local "last".
(inherit_in_ebb): Likewise for params "head", "tail" and locals
"prev_insn", "next_insn", "restore".
(remove_inheritance_pseudos): Likewise for local "prev_insn".
(undo_optional_reloads): Likewise for local "insn".
* lra-eliminations.c (lra_eliminate_regs_1): Likewise for param
"insn".
(lra_eliminate_regs): Replace NULL_RTX with NULL when referring to
insns.
(eliminate_regs_in_insn): Strengthen param "insn" from rtx to
rtx_insn *.
(spill_pseudos): Likewise for local "insn".
(init_elimination): Likewise.
(process_insn_for_elimination): Likewise for param "insn".
* lra-lives.c (curr_insn): Likewise.;
* lra-spills.c (assign_spill_hard_regs): Likewise for local "insn".
(remove_pseudos): Likewise for param "insn".
(spill_pseudos): Likewise for local "insn".
(lra_final_code_change): Likewise for locals "insn", "curr".
* lra.c (lra_invalidate_insn_data): Likewise for param "insn".
(lra_set_insn_deleted): Likewise.
(lra_delete_dead_insn): Likewise, and for local "prev".
(new_insn_reg): Likewise for param "insn".
(lra_set_insn_recog_data): Likewise.
(lra_update_insn_recog_data): Likewise.
(lra_set_used_insn_alternative): Likewise.
(get_insn_freq): Likewise.
(invalidate_insn_data_regno_info): Likewise.
(lra_invalidate_insn_regno_info): Likewise.
(lra_update_insn_regno_info): Likewise.
(lra_constraint_insn_stack): Strengthen from vec<rtx> to
vec<rtx_insn *>.
(lra_push_insn_1): Strengthen param "insn" from rtx to
rtx_insn *.
(lra_push_insn): Likewise.
(lra_push_insn_and_update_insn_regno_info): Likewise.
(lra_pop_insn): Likewise for return type and local "insn".
(push_insns): Likewise for params "from", "to", and local "insn".
(setup_sp_offset): Likewise for params "from", "last" and locals
"before", "insn".
(lra_process_new_insns): Likewise for params "insn", "before",
"after" and local "last".
(struct sloc): Likewise for field "insn".
(lra_former_scratch_operand_p): Likewise for param "insn".
(remove_scratches): Likewise for locals "insn", "last".
(check_rtl): Likewise for local "insn".
(add_auto_inc_notes): Likewise for param "insn".
(update_inc_notes): Likewise for local "insn".
(lra): Replace NULL_RTX with NULL when referring to insn.
---
gcc/lra-assigns.c | 2 +-
gcc/lra-coalesce.c | 21 ++++++--
gcc/lra-constraints.c | 128 +++++++++++++++++++++++++++++--------------------
gcc/lra-eliminations.c | 12 ++---
gcc/lra-int.h | 34 ++++++-------
gcc/lra-lives.c | 2 +-
gcc/lra-spills.c | 9 ++--
gcc/lra.c | 74 ++++++++++++++--------------
8 files changed, 162 insertions(+), 120 deletions(-)
diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c
index f7bb86b..dda0543 100644
--- a/gcc/lra-assigns.c
+++ b/gcc/lra-assigns.c
@@ -1221,7 +1221,7 @@ static void
assign_by_spills (void)
{
int i, n, nfails, iter, regno, hard_regno, cost, restore_regno;
- rtx insn;
+ rtx_insn *insn;
bitmap_head changed_insns, do_not_assign_nonreload_pseudos;
unsigned int u, conflict_regno;
bitmap_iterator bi;
diff --git a/gcc/lra-coalesce.c b/gcc/lra-coalesce.c
index 350977c..70e74f3 100644
--- a/gcc/lra-coalesce.c
+++ b/gcc/lra-coalesce.c
@@ -75,8 +75,8 @@ static int *first_coalesced_pseudo, *next_coalesced_pseudo;
static int
move_freq_compare_func (const void *v1p, const void *v2p)
{
- rtx mv1 = *(const rtx *) v1p;
- rtx mv2 = *(const rtx *) v2p;
+ rtx_insn *mv1 = *(rtx_insn * const *) v1p;
+ rtx_insn *mv2 = *(rtx_insn * const *) v2p;
int pri1, pri2;
pri1 = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (mv1));
@@ -168,6 +168,16 @@ substitute (rtx *loc)
return res;
}
+/* Specialize "substitute" for use on an insn. This can't change
+ the insn ptr, just the contents of the insn. */
+
+static bool
+substitute_within_insn (rtx_insn *insn)
+{
+ rtx loc = insn;
+ return substitute (&loc);
+}
+
/* The current iteration (1, 2, ...) of the coalescing pass. */
int lra_coalesce_iter;
@@ -219,7 +229,8 @@ bool
lra_coalesce (void)
{
basic_block bb;
- rtx mv, set, insn, next, *sorted_moves;
+ rtx_insn *mv, *insn, *next, **sorted_moves;
+ rtx set;
int i, mv_num, sregno, dregno;
unsigned int regno;
int coalesced_moves;
@@ -238,7 +249,7 @@ lra_coalesce (void)
next_coalesced_pseudo = XNEWVEC (int, max_regno);
for (i = 0; i < max_regno; i++)
first_coalesced_pseudo[i] = next_coalesced_pseudo[i] = i;
- sorted_moves = XNEWVEC (rtx, get_max_uid ());
+ sorted_moves = XNEWVEC (rtx_insn *, get_max_uid ());
mv_num = 0;
/* Collect moves. */
coalesced_moves = 0;
@@ -308,7 +319,7 @@ lra_coalesce (void)
if (INSN_P (insn)
&& bitmap_bit_p (&involved_insns_bitmap, INSN_UID (insn)))
{
- if (! substitute (&insn))
+ if (! substitute_within_insn (insn))
continue;
lra_update_insn_regno_info (insn);
if ((set = single_set (insn)) != NULL_RTX && set_noop_p (set))
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 69ffdcd..d665a09 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -138,7 +138,7 @@ static int bb_reload_num;
/* The current insn being processed and corresponding its single set
(NULL otherwise), its data (basic block, the insn data, the insn
static data, and the mode of each operand). */
-static rtx curr_insn;
+static rtx_insn *curr_insn;
static rtx curr_insn_set;
static basic_block curr_bb;
static lra_insn_recog_data_t curr_id;
@@ -381,7 +381,7 @@ get_equiv (rtx x)
return that value after elimination for INSN, otherwise return
X. */
static rtx
-get_equiv_with_elimination (rtx x, rtx insn)
+get_equiv_with_elimination (rtx x, rtx_insn *insn)
{
rtx res = get_equiv (x);
@@ -724,7 +724,7 @@ narrow_reload_pseudo_class (rtx reg, enum reg_class cl)
matched input operands INS. */
static void
match_reload (signed char out, signed char *ins, enum reg_class goal_class,
- rtx *before, rtx *after)
+ rtx_insn **before, rtx_insn **after)
{
int i, in;
rtx new_in_reg, new_out_reg, reg, clobber;
@@ -901,7 +901,7 @@ get_op_class (rtx op)
/* Return generated insn mem_pseudo:=val if TO_P or val:=mem_pseudo
otherwise. If modes of MEM_PSEUDO and VAL are different, use
SUBREG for VAL to make them equal. */
-static rtx
+static rtx_insn *
emit_spill_move (bool to_p, rtx mem_pseudo, rtx val)
{
if (GET_MODE (mem_pseudo) != GET_MODE (val))
@@ -922,9 +922,9 @@ emit_spill_move (bool to_p, rtx mem_pseudo, rtx val)
LRA_SUBREG_P (mem_pseudo) = 1;
}
}
- return (to_p
- ? gen_move_insn (mem_pseudo, val)
- : gen_move_insn (val, mem_pseudo));
+ return as_a <rtx_insn *> (to_p
+ ? gen_move_insn (mem_pseudo, val)
+ : gen_move_insn (val, mem_pseudo));
}
/* Process a special case insn (register move), return true if we
@@ -936,7 +936,8 @@ static bool
check_and_process_move (bool *change_p, bool *sec_mem_p ATTRIBUTE_UNUSED)
{
int sregno, dregno;
- rtx dest, src, dreg, sreg, old_sreg, new_reg, before, scratch_reg;
+ rtx dest, src, dreg, sreg, old_sreg, new_reg, scratch_reg;
+ rtx_insn *before;
enum reg_class dclass, sclass, secondary_class;
enum machine_mode sreg_mode;
secondary_reload_info sri;
@@ -1062,7 +1063,7 @@ check_and_process_move (bool *change_p, bool *sec_mem_p ATTRIBUTE_UNUSED)
}
before = get_insns ();
end_sequence ();
- lra_process_new_insns (curr_insn, before, NULL_RTX, "Inserting the move");
+ lra_process_new_insns (curr_insn, before, NULL, "Inserting the move");
if (new_reg != NULL_RTX)
{
if (GET_CODE (src) == SUBREG)
@@ -1136,7 +1137,8 @@ static int curr_swapped;
automodified value; handle that case by adding the required output
reloads to list AFTER. Return true if the RTL was changed. */
static bool
-process_addr_reg (rtx *loc, rtx *before, rtx *after, enum reg_class cl)
+process_addr_reg (rtx *loc, rtx_insn **before, rtx_insn **after,
+ enum reg_class cl)
{
int regno;
enum reg_class rclass, new_class;
@@ -1212,7 +1214,8 @@ process_addr_reg (rtx *loc, rtx *before, rtx *after, enum reg_class cl)
the insn to be inserted after curr insn. ORIGREG and NEWREG
are the original reg and new reg for reload. */
static void
-insert_move_for_subreg (rtx *before, rtx *after, rtx origreg, rtx newreg)
+insert_move_for_subreg (rtx_insn **before, rtx_insn **after, rtx origreg,
+ rtx newreg)
{
if (before)
{
@@ -1238,14 +1241,14 @@ static bool
simplify_operand_subreg (int nop, enum machine_mode reg_mode)
{
int hard_regno;
- rtx before, after;
+ rtx_insn *before, *after;
enum machine_mode mode;
rtx reg, new_reg;
rtx operand = *curr_id->operand_loc[nop];
enum reg_class regclass;
enum op_type type;
- before = after = NULL_RTX;
+ before = after = NULL;
if (GET_CODE (operand) != SUBREG)
return false;
@@ -2791,7 +2794,7 @@ equiv_address_substitution (struct address_info *ad)
To do all necessary transformations use function
process_address. */
static bool
-process_address_1 (int nop, rtx *before, rtx *after)
+process_address_1 (int nop, rtx_insn **before, rtx_insn **after)
{
struct address_info ad;
rtx new_reg;
@@ -2929,7 +2932,8 @@ process_address_1 (int nop, rtx *before, rtx *after)
{
int regno;
enum reg_class cl;
- rtx set, insns, last_insn;
+ rtx set;
+ rtx_insn *insns, *last_insn;
/* base + disp => new base, cases (1) and (3) above. */
/* Another option would be to reload the displacement into an
index register. However, postreload has code to optimize
@@ -2994,7 +2998,7 @@ process_address_1 (int nop, rtx *before, rtx *after)
/* Do address reloads until it is necessary. Use process_address_1 as
a helper function. Return true for any RTL changes. */
static bool
-process_address (int nop, rtx *before, rtx *after)
+process_address (int nop, rtx_insn **before, rtx_insn **after)
{
bool res = false;
@@ -3021,7 +3025,7 @@ emit_inc (enum reg_class new_rclass, rtx in, rtx value, int inc_amount)
/* Nonzero if increment after copying. */
int post = (GET_CODE (value) == POST_DEC || GET_CODE (value) == POST_INC
|| GET_CODE (value) == POST_MODIFY);
- rtx last;
+ rtx_insn *last;
rtx inc;
rtx add_insn;
int code;
@@ -3181,7 +3185,7 @@ curr_insn_transform (void)
int commutative;
signed char goal_alt_matched[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
signed char match_inputs[MAX_RECOG_OPERANDS + 1];
- rtx before, after;
+ rtx_insn *before, *after;
bool alt_p = false;
/* Flag that the insn has been changed through a transformation. */
bool change_p;
@@ -3279,7 +3283,7 @@ curr_insn_transform (void)
/* Reload address registers and displacements. We do it before
finding an alternative because of memory constraints. */
- before = after = NULL_RTX;
+ before = after = NULL;
for (i = 0; i < n_operands; i++)
if (! curr_static_id->operand[i].is_operator
&& process_address (i, &before, &after))
@@ -3398,7 +3402,7 @@ curr_insn_transform (void)
secondary memory moves we can not reuse the original
insn. */
after = emit_spill_move (false, new_reg, dest);
- lra_process_new_insns (curr_insn, NULL_RTX, after,
+ lra_process_new_insns (curr_insn, NULL, after,
"Inserting the sec. move");
/* We may have non null BEFORE here (e.g. after address
processing. */
@@ -3407,14 +3411,14 @@ curr_insn_transform (void)
emit_insn (before);
before = get_insns ();
end_sequence ();
- lra_process_new_insns (curr_insn, before, NULL_RTX, "Changing on");
+ lra_process_new_insns (curr_insn, before, NULL, "Changing on");
lra_set_insn_deleted (curr_insn);
}
else if (dest == rld)
{
*curr_id->operand_loc[0] = new_reg;
after = emit_spill_move (false, new_reg, dest);
- lra_process_new_insns (curr_insn, NULL_RTX, after,
+ lra_process_new_insns (curr_insn, NULL, after,
"Inserting the sec. move");
}
else
@@ -3426,7 +3430,7 @@ curr_insn_transform (void)
emit_insn (before);
before = get_insns ();
end_sequence ();
- lra_process_new_insns (curr_insn, before, NULL_RTX,
+ lra_process_new_insns (curr_insn, before, NULL,
"Inserting the sec. move");
}
lra_update_insn_regno_info (curr_insn);
@@ -3878,7 +3882,7 @@ loc_equivalence_callback (rtx loc, const_rtx, void *data)
return NULL_RTX;
rtx subst = (data == NULL
- ? get_equiv (loc) : get_equiv_with_elimination (loc, (rtx) data));
+ ? get_equiv (loc) : get_equiv_with_elimination (loc, (rtx_insn *) data));
if (subst != loc)
return subst;
@@ -4406,6 +4410,16 @@ substitute_pseudo (rtx *loc, int old_regno, rtx new_reg)
return result;
}
+/* Call substitute_pseudo within an insn. This won't update the insn ptr,
+ just the contents of the insn. */
+
+static bool
+substitute_pseudo_within_insn (rtx_insn *insn, int old_regno, rtx new_reg)
+{
+ rtx loc = insn;
+ return substitute_pseudo (&loc, old_regno, new_reg);
+}
+
/* Return first non-debug insn in list USAGE_INSNS. */
static rtx
skip_usage_debug_insns (rtx usage_insns)
@@ -4477,14 +4491,15 @@ static bitmap_head check_only_regs;
class of ORIGINAL REGNO. */
static bool
inherit_reload_reg (bool def_p, int original_regno,
- enum reg_class cl, rtx insn, rtx next_usage_insns)
+ enum reg_class cl, rtx_insn *insn, rtx next_usage_insns)
{
if (optimize_function_for_size_p (cfun))
return false;
enum reg_class rclass = lra_get_allocno_class (original_regno);
rtx original_reg = regno_reg_rtx[original_regno];
- rtx new_reg, new_insns, usage_insn;
+ rtx new_reg, usage_insn;
+ rtx_insn *new_insns;
lra_assert (! usage_insns[original_regno].after_p);
if (lra_dump_file != NULL)
@@ -4565,7 +4580,7 @@ inherit_reload_reg (bool def_p, int original_regno,
}
return false;
}
- substitute_pseudo (&insn, original_regno, new_reg);
+ substitute_pseudo_within_insn (insn, original_regno, new_reg);
lra_update_insn_regno_info (insn);
if (! def_p)
/* We now have a new usage insn for original regno. */
@@ -4578,10 +4593,10 @@ inherit_reload_reg (bool def_p, int original_regno,
bitmap_set_bit (&check_only_regs, original_regno);
bitmap_set_bit (&lra_inheritance_pseudos, REGNO (new_reg));
if (def_p)
- lra_process_new_insns (insn, NULL_RTX, new_insns,
+ lra_process_new_insns (insn, NULL, new_insns,
"Add original<-inheritance");
else
- lra_process_new_insns (insn, new_insns, NULL_RTX,
+ lra_process_new_insns (insn, new_insns, NULL,
"Add inheritance<-original");
while (next_usage_insns != NULL_RTX)
{
@@ -4598,7 +4613,7 @@ inherit_reload_reg (bool def_p, int original_regno,
next_usage_insns = XEXP (next_usage_insns, 1);
}
substitute_pseudo (&usage_insn, original_regno, new_reg);
- lra_update_insn_regno_info (usage_insn);
+ lra_update_insn_regno_info (as_a <rtx_insn *> (usage_insn));
if (lra_dump_file != NULL)
{
fprintf (lra_dump_file,
@@ -4746,12 +4761,14 @@ choose_split_class (enum reg_class allocno_class,
if BEFORE_P is true. Return true if we succeed in such
transformation. */
static bool
-split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
+split_reg (bool before_p, int original_regno, rtx_insn *insn,
+ rtx next_usage_insns)
{
enum reg_class rclass;
rtx original_reg;
int hard_regno, nregs;
- rtx new_reg, save, restore, usage_insn;
+ rtx new_reg, usage_insn;
+ rtx_insn *restore, *save;
bool after_p;
bool call_save_p;
@@ -4857,7 +4874,7 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
lra_assert (DEBUG_INSN_P (usage_insn));
next_usage_insns = XEXP (next_usage_insns, 1);
substitute_pseudo (&usage_insn, original_regno, new_reg);
- lra_update_insn_regno_info (usage_insn);
+ lra_update_insn_regno_info (as_a <rtx_insn *> (usage_insn));
if (lra_dump_file != NULL)
{
fprintf (lra_dump_file, " Split reuse change %d->%d:\n",
@@ -4867,12 +4884,13 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
}
lra_assert (NOTE_P (usage_insn) || NONDEBUG_INSN_P (usage_insn));
lra_assert (usage_insn != insn || (after_p && before_p));
- lra_process_new_insns (usage_insn, after_p ? NULL_RTX : restore,
- after_p ? restore : NULL_RTX,
+ lra_process_new_insns (as_a <rtx_insn *> (usage_insn),
+ after_p ? NULL : restore,
+ after_p ? restore : NULL,
call_save_p
? "Add reg<-save" : "Add reg<-split");
- lra_process_new_insns (insn, before_p ? save : NULL_RTX,
- before_p ? NULL_RTX : save,
+ lra_process_new_insns (insn, before_p ? save : NULL,
+ before_p ? NULL : save,
call_save_p
? "Add save<-reg" : "Add split<-reg");
if (nregs > 1)
@@ -4898,7 +4916,7 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
static bool
split_if_necessary (int regno, enum machine_mode mode,
HARD_REG_SET potential_reload_hard_regs,
- bool before_p, rtx insn, int max_uid)
+ bool before_p, rtx_insn *insn, int max_uid)
{
bool res = false;
int i, nregs = 1;
@@ -4928,12 +4946,13 @@ static bitmap_head live_regs;
inheritance/split transformation. The function removes dead moves
too. */
static void
-update_ebb_live_info (rtx head, rtx tail)
+update_ebb_live_info (rtx_insn *head, rtx_insn *tail)
{
unsigned int j;
int i, regno;
bool live_p;
- rtx prev_insn, set;
+ rtx_insn *prev_insn;
+ rtx set;
bool remove_p;
basic_block last_bb, prev_bb, curr_bb;
bitmap_iterator bi;
@@ -5068,10 +5087,10 @@ add_to_inherit (int regno, rtx insns)
/* Return the last non-debug insn in basic block BB, or the block begin
note if none. */
-static rtx
+static rtx_insn *
get_last_insertion_point (basic_block bb)
{
- rtx insn;
+ rtx_insn *insn;
FOR_BB_INSNS_REVERSE (bb, insn)
if (NONDEBUG_INSN_P (insn) || NOTE_INSN_BASIC_BLOCK_P (insn))
@@ -5084,7 +5103,7 @@ get_last_insertion_point (basic_block bb)
static void
get_live_on_other_edges (basic_block from, basic_block to, bitmap res)
{
- rtx last;
+ rtx_insn *last;
struct lra_insn_reg *reg;
edge e;
edge_iterator ei;
@@ -5128,11 +5147,12 @@ static const int max_small_class_regs_num = 2;
splitting even more but it is to expensive and the current approach
works well enough. */
static bool
-inherit_in_ebb (rtx head, rtx tail)
+inherit_in_ebb (rtx_insn *head, rtx_insn *tail)
{
int i, src_regno, dst_regno, nregs;
bool change_p, succ_p, update_reloads_num_p;
- rtx prev_insn, next_usage_insns, set, last_insn;
+ rtx_insn *prev_insn, *last_insn;
+ rtx next_usage_insns, set;
enum reg_class cl;
struct lra_insn_reg *reg;
basic_block last_processed_bb, curr_bb = NULL;
@@ -5332,7 +5352,8 @@ inherit_in_ebb (rtx head, rtx tail)
change_p = true;
if (CALL_P (curr_insn))
{
- rtx cheap, pat, dest, restore;
+ rtx cheap, pat, dest;
+ rtx_insn *restore;
int regno, hard_regno;
calls_num++;
@@ -5631,7 +5652,8 @@ remove_inheritance_pseudos (bitmap remove_pseudos)
{
basic_block bb;
int regno, sregno, prev_sregno, dregno, restore_regno;
- rtx set, prev_set, prev_insn;
+ rtx set, prev_set;
+ rtx_insn *prev_insn;
bool change_p, done_p;
change_p = ! bitmap_empty_p (remove_pseudos);
@@ -5751,8 +5773,8 @@ remove_inheritance_pseudos (bitmap remove_pseudos)
{
if (change_p && bitmap_bit_p (remove_pseudos, regno))
{
- substitute_pseudo (&curr_insn, regno,
- regno_reg_rtx[restore_regno]);
+ substitute_pseudo_within_insn (
+ curr_insn, regno, regno_reg_rtx[restore_regno]);
restored_regs_p = true;
}
else
@@ -5793,7 +5815,8 @@ undo_optional_reloads (void)
bool change_p, keep_p;
unsigned int regno, uid;
bitmap_iterator bi, bi2;
- rtx insn, set, src, dest;
+ rtx_insn *insn;
+ rtx set, src, dest;
bitmap_head removed_optional_reload_pseudos, insn_bitmap;
bitmap_initialize (&removed_optional_reload_pseudos, ®_obstack);
@@ -5874,8 +5897,9 @@ undo_optional_reloads (void)
we remove the inheritance pseudo and the optional
reload. */
}
- substitute_pseudo (&insn, regno,
- regno_reg_rtx[lra_reg_info[regno].restore_regno]);
+ substitute_pseudo_within_insn (
+ insn, regno,
+ regno_reg_rtx[lra_reg_info[regno].restore_regno]);
lra_update_insn_regno_info (insn);
if (lra_dump_file != NULL)
{
diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c
index 2787820..2113a88 100644
--- a/gcc/lra-eliminations.c
+++ b/gcc/lra-eliminations.c
@@ -302,7 +302,7 @@ get_elimination (rtx reg)
If we make full substitution to SP for non-null INSN, add the insn
sp offset. */
rtx
-lra_eliminate_regs_1 (rtx insn, rtx x, enum machine_mode mem_mode,
+lra_eliminate_regs_1 (rtx_insn *insn, rtx x, enum machine_mode mem_mode,
bool subst_p, bool update_p, bool full_p)
{
enum rtx_code code = GET_CODE (x);
@@ -657,7 +657,7 @@ rtx
lra_eliminate_regs (rtx x, enum machine_mode mem_mode,
rtx insn ATTRIBUTE_UNUSED)
{
- return lra_eliminate_regs_1 (NULL_RTX, x, mem_mode, true, false, true);
+ return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, true);
}
/* Stack pointer offset before the current insn relative to one at the
@@ -848,7 +848,7 @@ remove_reg_equal_offset_note (rtx insn, rtx what)
previously used) in future. */
static void
-eliminate_regs_in_insn (rtx insn, bool replace_p, bool first_p)
+eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p)
{
int icode = recog_memoized (insn);
rtx old_set = single_set (insn);
@@ -1086,7 +1086,7 @@ spill_pseudos (HARD_REG_SET set)
{
int i;
bitmap_head to_process;
- rtx insn;
+ rtx_insn *insn;
if (hard_reg_set_empty_p (set))
return;
@@ -1290,7 +1290,7 @@ init_elimination (void)
{
bool stop_to_sp_elimination_p;
basic_block bb;
- rtx insn;
+ rtx_insn *insn;
struct elim_table *ep;
init_elim_table ();
@@ -1339,7 +1339,7 @@ lra_eliminate_reg_if_possible (rtx *loc)
the insn for subsequent processing in the constraint pass, update
the insn info. */
static void
-process_insn_for_elimination (rtx insn, bool final_p, bool first_p)
+process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
{
eliminate_regs_in_insn (insn, final_p, first_p);
if (! final_p)
diff --git a/gcc/lra-int.h b/gcc/lra-int.h
index 41c9849..2e4f870 100644
--- a/gcc/lra-int.h
+++ b/gcc/lra-int.h
@@ -214,7 +214,7 @@ struct lra_insn_recog_data
/* SP offset before the insn relative to one at the func start. */
HOST_WIDE_INT sp_offset;
/* The insn itself. */
- rtx insn;
+ rtx_insn *insn;
/* Common data for insns with the same ICODE. Asm insns (their
ICODE is negative) do not share such structures. */
struct lra_static_insn_data *insn_static_data;
@@ -276,38 +276,39 @@ extern lra_insn_recog_data_t *lra_insn_recog_data;
extern int lra_curr_reload_num;
-extern void lra_push_insn (rtx);
+extern void lra_push_insn (rtx_insn *);
extern void lra_push_insn_by_uid (unsigned int);
-extern void lra_push_insn_and_update_insn_regno_info (rtx);
-extern rtx lra_pop_insn (void);
+extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
+extern rtx_insn *lra_pop_insn (void);
extern unsigned int lra_insn_stack_length (void);
extern rtx lra_create_new_reg_with_unique_value (enum machine_mode, rtx,
enum reg_class, const char *);
extern void lra_set_regno_unique_value (int);
-extern void lra_invalidate_insn_data (rtx);
-extern void lra_set_insn_deleted (rtx);
-extern void lra_delete_dead_insn (rtx);
+extern void lra_invalidate_insn_data (rtx_insn *);
+extern void lra_set_insn_deleted (rtx_insn *);
+extern void lra_delete_dead_insn (rtx_insn *);
extern void lra_emit_add (rtx, rtx, rtx);
extern void lra_emit_move (rtx, rtx);
extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
-extern void lra_process_new_insns (rtx, rtx, rtx, const char *);
+extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
+ const char *);
-extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx);
-extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx);
-extern void lra_set_used_insn_alternative (rtx, int);
+extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
+extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
+extern void lra_set_used_insn_alternative (rtx_insn *, int);
extern void lra_set_used_insn_alternative_by_uid (int, int);
-extern void lra_invalidate_insn_regno_info (rtx);
-extern void lra_update_insn_regno_info (rtx);
+extern void lra_invalidate_insn_regno_info (rtx_insn *);
+extern void lra_update_insn_regno_info (rtx_insn *);
extern struct lra_insn_reg *lra_get_insn_regs (int);
extern void lra_free_copies (void);
extern void lra_create_copy (int, int, int);
extern lra_copy_t lra_get_copy (int);
extern bool lra_former_scratch_p (int);
-extern bool lra_former_scratch_operand_p (rtx, int);
+extern bool lra_former_scratch_operand_p (rtx_insn *, int);
extern int lra_new_regno_start;
extern int lra_constraint_new_regno_start;
@@ -380,7 +381,8 @@ extern void lra_final_code_change (void);
extern void lra_debug_elim_table (void);
extern int lra_get_elimination_hard_regno (int);
-extern rtx lra_eliminate_regs_1 (rtx, rtx, enum machine_mode, bool, bool, bool);
+extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, enum machine_mode, bool,
+ bool, bool);
extern void lra_eliminate (bool, bool);
extern void lra_eliminate_reg_if_possible (rtx *);
@@ -446,7 +448,7 @@ lra_update_operator_dups (lra_insn_recog_data_t id)
/* Return info about INSN. Set up the info if it is not done yet. */
static inline lra_insn_recog_data_t
-lra_get_insn_recog_data (rtx insn)
+lra_get_insn_recog_data (rtx_insn *insn)
{
lra_insn_recog_data_t data;
unsigned int uid = INSN_UID (insn);
diff --git a/gcc/lra-lives.c b/gcc/lra-lives.c
index 8444ade..f2462ec 100644
--- a/gcc/lra-lives.c
+++ b/gcc/lra-lives.c
@@ -358,7 +358,7 @@ mark_regno_dead (int regno, enum machine_mode mode, int point)
}
/* Insn currently scanned. */
-static rtx curr_insn;
+static rtx_insn *curr_insn;
/* The insn data. */
static lra_insn_recog_data_t curr_id;
/* The insn static data. */
diff --git a/gcc/lra-spills.c b/gcc/lra-spills.c
index 50f63fc..a6fb65b 100644
--- a/gcc/lra-spills.c
+++ b/gcc/lra-spills.c
@@ -256,7 +256,8 @@ assign_spill_hard_regs (int *pseudo_regnos, int n)
enum reg_class rclass, spill_class;
enum machine_mode mode;
lra_live_range_t r;
- rtx insn, set;
+ rtx_insn *insn;
+ rtx set;
basic_block bb;
HARD_REG_SET conflict_hard_regs;
bitmap_head ok_insn_bitmap;
@@ -411,7 +412,7 @@ assign_stack_slot_num_and_sort_pseudos (int *pseudo_regnos, int n)
corresponding memory or spilled hard reg. Ignore spilled pseudos
created from the scratches. */
static void
-remove_pseudos (rtx *loc, rtx insn)
+remove_pseudos (rtx *loc, rtx_insn *insn)
{
int i;
rtx hard_reg;
@@ -463,7 +464,7 @@ static void
spill_pseudos (void)
{
basic_block bb;
- rtx insn;
+ rtx_insn *insn;
int i;
bitmap_head spilled_pseudos, changed_insns;
@@ -679,7 +680,7 @@ lra_final_code_change (void)
{
int i, hard_regno;
basic_block bb;
- rtx insn, curr;
+ rtx_insn *insn, *curr;
int max_regno = max_reg_num ();
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
diff --git a/gcc/lra.c b/gcc/lra.c
index ecec890..a97ec77 100644
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -125,8 +125,9 @@ HARD_REG_SET lra_no_alloc_regs;
static int get_new_reg_value (void);
static void expand_reg_info (void);
static void invalidate_insn_recog_data (int);
-static int get_insn_freq (rtx);
-static void invalidate_insn_data_regno_info (lra_insn_recog_data_t, rtx, int);
+static int get_insn_freq (rtx_insn *);
+static void invalidate_insn_data_regno_info (lra_insn_recog_data_t,
+ rtx_insn *, int);
/* Expand all regno related info needed for LRA. */
static void
@@ -210,7 +211,7 @@ lra_set_regno_unique_value (int regno)
/* Invalidate INSN related info used by LRA. The info should never be
used after that. */
void
-lra_invalidate_insn_data (rtx insn)
+lra_invalidate_insn_data (rtx_insn *insn)
{
lra_invalidate_insn_regno_info (insn);
invalidate_insn_recog_data (INSN_UID (insn));
@@ -219,7 +220,7 @@ lra_invalidate_insn_data (rtx insn)
/* Mark INSN deleted and invalidate the insn related info used by
LRA. */
void
-lra_set_insn_deleted (rtx insn)
+lra_set_insn_deleted (rtx_insn *insn)
{
lra_invalidate_insn_data (insn);
SET_INSN_DELETED (insn);
@@ -228,9 +229,9 @@ lra_set_insn_deleted (rtx insn)
/* Delete an unneeded INSN and any previous insns who sole purpose is
loading data that is dead in INSN. */
void
-lra_delete_dead_insn (rtx insn)
+lra_delete_dead_insn (rtx_insn *insn)
{
- rtx prev = prev_real_insn (insn);
+ rtx_insn *prev = prev_real_insn (insn);
rtx prev_dest;
/* If the previous insn sets a register that dies in our insn,
@@ -503,7 +504,8 @@ init_insn_regs (void)
in the insn (EARLY_CLOBBER), and reference to the next insn reg
info (NEXT). */
static struct lra_insn_reg *
-new_insn_reg (rtx insn, int regno, enum op_type type, enum machine_mode mode,
+new_insn_reg (rtx_insn *insn, int regno, enum op_type type,
+ enum machine_mode mode,
bool subreg_p, bool early_clobber, struct lra_insn_reg *next)
{
struct lra_insn_reg *ir;
@@ -1041,7 +1043,7 @@ collect_non_operand_hard_regs (rtx *x, lra_insn_recog_data_t data,
/* Set up and return info about INSN. Set up the info if it is not set up
yet. */
lra_insn_recog_data_t
-lra_set_insn_recog_data (rtx insn)
+lra_set_insn_recog_data (rtx_insn *insn)
{
lra_insn_recog_data_t data;
int i, n, icode;
@@ -1267,7 +1269,7 @@ invalidate_insn_recog_data (int uid)
/* Update all the insn info about INSN. It is usually called when
something in the insn was changed. Return the updated info. */
lra_insn_recog_data_t
-lra_update_insn_recog_data (rtx insn)
+lra_update_insn_recog_data (rtx_insn *insn)
{
lra_insn_recog_data_t data;
int n;
@@ -1371,7 +1373,7 @@ lra_update_insn_recog_data (rtx insn)
/* Set up that INSN is using alternative ALT now. */
void
-lra_set_used_insn_alternative (rtx insn, int alt)
+lra_set_used_insn_alternative (rtx_insn *insn, int alt)
{
lra_insn_recog_data_t data;
@@ -1664,7 +1666,7 @@ add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid,
/* Return execution frequency of INSN. */
static int
-get_insn_freq (rtx insn)
+get_insn_freq (rtx_insn *insn)
{
basic_block bb = BLOCK_FOR_INSN (insn);
@@ -1675,7 +1677,7 @@ get_insn_freq (rtx insn)
/* Invalidate all reg info of INSN with DATA and execution frequency
FREQ. Update common info about the invalidated registers. */
static void
-invalidate_insn_data_regno_info (lra_insn_recog_data_t data, rtx insn,
+invalidate_insn_data_regno_info (lra_insn_recog_data_t data, rtx_insn *insn,
int freq)
{
int uid;
@@ -1704,7 +1706,7 @@ invalidate_insn_data_regno_info (lra_insn_recog_data_t data, rtx insn,
/* Invalidate all reg info of INSN. Update common info about the
invalidated registers. */
void
-lra_invalidate_insn_regno_info (rtx insn)
+lra_invalidate_insn_regno_info (rtx_insn *insn)
{
invalidate_insn_data_regno_info (lra_get_insn_recog_data (insn), insn,
get_insn_freq (insn));
@@ -1729,7 +1731,7 @@ setup_insn_reg_info (lra_insn_recog_data_t data, int freq)
/* Set up insn reg info of INSN. Update common reg info from reg info
of INSN. */
void
-lra_update_insn_regno_info (rtx insn)
+lra_update_insn_regno_info (rtx_insn *insn)
{
int i, uid, freq;
lra_insn_recog_data_t data;
@@ -1773,13 +1775,13 @@ lra_get_insn_regs (int uid)
static sbitmap lra_constraint_insn_stack_bitmap;
/* The stack itself. */
-vec<rtx> lra_constraint_insn_stack;
+vec<rtx_insn *> lra_constraint_insn_stack;
/* Put INSN on the stack. If ALWAYS_UPDATE is true, always update the reg
info for INSN, otherwise only update it if INSN is not already on the
stack. */
static inline void
-lra_push_insn_1 (rtx insn, bool always_update)
+lra_push_insn_1 (rtx_insn *insn, bool always_update)
{
unsigned int uid = INSN_UID (insn);
if (always_update)
@@ -1797,14 +1799,14 @@ lra_push_insn_1 (rtx insn, bool always_update)
/* Put INSN on the stack. */
void
-lra_push_insn (rtx insn)
+lra_push_insn (rtx_insn *insn)
{
lra_push_insn_1 (insn, false);
}
/* Put INSN on the stack and update its reg info. */
void
-lra_push_insn_and_update_insn_regno_info (rtx insn)
+lra_push_insn_and_update_insn_regno_info (rtx_insn *insn)
{
lra_push_insn_1 (insn, true);
}
@@ -1817,10 +1819,10 @@ lra_push_insn_by_uid (unsigned int uid)
}
/* Take the last-inserted insns off the stack and return it. */
-rtx
+rtx_insn *
lra_pop_insn (void)
{
- rtx insn = lra_constraint_insn_stack.pop ();
+ rtx_insn *insn = lra_constraint_insn_stack.pop ();
bitmap_clear_bit (lra_constraint_insn_stack_bitmap, INSN_UID (insn));
return insn;
}
@@ -1834,9 +1836,9 @@ lra_insn_stack_length (void)
/* Push insns FROM to TO (excluding it) going in reverse order. */
static void
-push_insns (rtx from, rtx to)
+push_insns (rtx_insn *from, rtx_insn *to)
{
- rtx insn;
+ rtx_insn *insn;
if (from == NULL_RTX)
return;
@@ -1849,13 +1851,13 @@ push_insns (rtx from, rtx to)
taken from the next BB insn after LAST or zero if there in such
insn. */
static void
-setup_sp_offset (rtx from, rtx last)
+setup_sp_offset (rtx_insn *from, rtx_insn *last)
{
- rtx before = next_nonnote_insn_bb (last);
+ rtx_insn *before = next_nonnote_insn_bb (last);
HOST_WIDE_INT offset = (before == NULL_RTX || ! INSN_P (before)
? 0 : lra_get_insn_recog_data (before)->sp_offset);
- for (rtx insn = from; insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
+ for (rtx_insn *insn = from; insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
lra_get_insn_recog_data (insn)->sp_offset = offset;
}
@@ -1863,9 +1865,10 @@ setup_sp_offset (rtx from, rtx last)
insns onto the stack. Print about emitting the insns with
TITLE. */
void
-lra_process_new_insns (rtx insn, rtx before, rtx after, const char *title)
+lra_process_new_insns (rtx_insn *insn, rtx_insn *before, rtx_insn *after,
+ const char *title)
{
- rtx last;
+ rtx_insn *last;
if (before == NULL_RTX && after == NULL_RTX)
return;
@@ -1915,7 +1918,7 @@ lra_process_new_insns (rtx insn, rtx before, rtx after, const char *title)
/* Description of location of a former scratch operand. */
struct sloc
{
- rtx insn; /* Insn where the scratch was. */
+ rtx_insn *insn; /* Insn where the scratch was. */
int nop; /* Number of the operand which was a scratch. */
};
@@ -1939,7 +1942,7 @@ lra_former_scratch_p (int regno)
/* Return true if the operand NOP of INSN is a former scratch. */
bool
-lra_former_scratch_operand_p (rtx insn, int nop)
+lra_former_scratch_operand_p (rtx_insn *insn, int nop)
{
return bitmap_bit_p (&scratch_operand_bitmap,
INSN_UID (insn) * MAX_RECOG_OPERANDS + nop) != 0;
@@ -1952,7 +1955,8 @@ remove_scratches (void)
int i;
bool insn_changed_p;
basic_block bb;
- rtx insn, reg;
+ rtx_insn *insn;
+ rtx reg;
sloc_t loc;
lra_insn_recog_data_t id;
struct lra_static_insn_data *static_id;
@@ -2003,7 +2007,7 @@ restore_scratches (void)
int regno;
unsigned i;
sloc_t loc;
- rtx last = NULL_RTX;
+ rtx_insn *last = NULL;
lra_insn_recog_data_t id = NULL;
for (i = 0; scratches.iterate (i, &loc); i++)
@@ -2046,7 +2050,7 @@ static void
check_rtl (bool final_p)
{
basic_block bb;
- rtx insn;
+ rtx_insn *insn;
lra_assert (! final_p || reload_completed);
FOR_EACH_BB_FN (bb, cfun)
@@ -2128,7 +2132,7 @@ has_nonexceptional_receiver (void)
/* Process recursively X of INSN and add REG_INC notes if necessary. */
static void
-add_auto_inc_notes (rtx insn, rtx x)
+add_auto_inc_notes (rtx_insn *insn, rtx x)
{
enum rtx_code code = GET_CODE (x);
const char *fmt;
@@ -2163,7 +2167,7 @@ update_inc_notes (void)
{
rtx *pnote;
basic_block bb;
- rtx insn;
+ rtx_insn *insn;
FOR_EACH_BB_FN (bb, cfun)
FOR_BB_INSNS (bb, insn)
@@ -2308,7 +2312,7 @@ lra (FILE *f)
lra_live_ranges_init ();
lra_constraints_init ();
lra_curr_reload_num = 0;
- push_insns (get_last_insn (), NULL_RTX);
+ push_insns (get_last_insn (), NULL);
/* It is needed for the 1st coalescing. */
lra_constraint_new_insn_uid_start = get_max_uid ();
bitmap_initialize (&lra_inheritance_pseudos, ®_obstack);
--
1.8.5.3
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