[PATCH 4/6] Andes nds32: testsuite modifications for nds32 target.
Chung-Ju Wu
jasonwucj@gmail.com
Sun Sep 8 16:31:00 GMT 2013
On 7/25/13 12:23 AM, Chung-Ju Wu wrote:
>
> A revised patch is provided and here is a summary:
>
> 1. The extend identifiers testcases are supposed to be tested.
> 2. Add preliminary nds32-specific testcases.
>
>
It has been a while since last v2 patch.
So I create a new v3 patch to resolve some conflicts
on testcases with current trunk.
The nds32 port is accepted by GCC SC and
there is no further comment to the patch.
Is it OK to apply on the trunk?
Best regards,
jasonwucj
-------------- next part --------------
diff --git gcc/testsuite/g++.dg/other/PR23205.C gcc/testsuite/g++.dg/other/PR23205.C
index e55710b..26a9dd5 100644
--- gcc/testsuite/g++.dg/other/PR23205.C
+++ gcc/testsuite/g++.dg/other/PR23205.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* nds32*-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */
/* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types" } */
const int foobar = 4;
diff --git gcc/testsuite/g++.dg/other/pr23205-2.C gcc/testsuite/g++.dg/other/pr23205-2.C
index 607e5a2..b25cb73 100644
--- gcc/testsuite/g++.dg/other/pr23205-2.C
+++ gcc/testsuite/g++.dg/other/pr23205-2.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* nds32*-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */
/* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types -ftoplevel-reorder" } */
const int foobar = 4;
diff --git gcc/testsuite/gcc.dg/20020312-2.c gcc/testsuite/gcc.dg/20020312-2.c
index 633da5b..6f5a953 100644
--- gcc/testsuite/gcc.dg/20020312-2.c
+++ gcc/testsuite/gcc.dg/20020312-2.c
@@ -52,6 +52,8 @@ extern void abort (void);
/* No pic register. */
#elif defined(__moxie__)
/* No pic register. */
+#elif defined(__nds32__)
+/* No pic register. */
#elif defined(__hppa__)
/* PIC register is %r27 or %r19, but is used even without -fpic. */
#elif defined(__pdp11__)
diff --git gcc/testsuite/gcc.dg/builtin-apply2.c gcc/testsuite/gcc.dg/builtin-apply2.c
index daaef47..70ab7b3 100644
--- gcc/testsuite/gcc.dg/builtin-apply2.c
+++ gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */
+/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* nds32*-*-*" } { "*" } { "" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */
/* PR target/12503 */
diff --git gcc/testsuite/gcc.dg/lower-subreg-1.c gcc/testsuite/gcc.dg/lower-subreg-1.c
index 102ba22..12dcd10 100644
--- gcc/testsuite/gcc.dg/lower-subreg-1.c
+++ gcc/testsuite/gcc.dg/lower-subreg-1.c
@@ -1,6 +1,7 @@
/* { dg-do compile { target { ! { mips64 || { aarch64*-*-* arm*-*-* ia64-*-* sparc*-*-* spu-*-* tilegx-*-* } } } } } */
/* { dg-options "-O -fdump-rtl-subreg1" } */
/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } { "*" } { "" } } */
+/* { dg-skip-if "nds32 target has special operations for 64-bit behavior" { nds32*-*-* } { "*" } { "" } } */
/* { dg-require-effective-target ilp32 } */
long long test (long long a, long long b) { return a | b; }
diff --git gcc/testsuite/gcc.dg/sibcall-3.c gcc/testsuite/gcc.dg/sibcall-3.c
index c4460e2..e02a410 100644
--- gcc/testsuite/gcc.dg/sibcall-3.c
+++ gcc/testsuite/gcc.dg/sibcall-3.c
@@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* -mlongcall disables sibcall patterns. */
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
/* { dg-options "-O2 -foptimize-sibling-calls" } */
diff --git gcc/testsuite/gcc.dg/sibcall-4.c gcc/testsuite/gcc.dg/sibcall-4.c
index 4f468f6..a66ed07 100644
--- gcc/testsuite/gcc.dg/sibcall-4.c
+++ gcc/testsuite/gcc.dg/sibcall-4.c
@@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* -mlongcall disables sibcall patterns. */
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
/* { dg-options "-O2 -foptimize-sibling-calls" } */
diff --git gcc/testsuite/gcc.dg/stack-usage-1.c gcc/testsuite/gcc.dg/stack-usage-1.c
index ff9709a..0b761b5 100644
--- gcc/testsuite/gcc.dg/stack-usage-1.c
+++ gcc/testsuite/gcc.dg/stack-usage-1.c
@@ -38,6 +38,9 @@
# else
# define SIZE 248
# endif
+#elif defined (__nds32__)
+# define SIZE 248 /* 256 - 8 bytes, only $fp and padding bytes are saved in
+ the register save area under O0 optimization level. */
#elif defined (__powerpc64__) || defined (__ppc64__) || defined (__POWERPC64__) \
|| defined (__PPC64__)
# define SIZE 180
diff --git gcc/testsuite/gcc.dg/torture/pr37868.c gcc/testsuite/gcc.dg/torture/pr37868.c
index cc9c24f..5204c5a 100644
--- gcc/testsuite/gcc.dg/torture/pr37868.c
+++ gcc/testsuite/gcc.dg/torture/pr37868.c
@@ -1,6 +1,6 @@
/* { dg-do run } */
/* { dg-options "-fno-strict-aliasing" } */
-/* { dg-skip-if "unaligned access" { arc*-*-* epiphany-*-* sparc*-*-* sh*-*-* tic6x-*-* } "*" "" } */
+/* { dg-skip-if "unaligned access" { arc*-*-* epiphany-*-* nds32*-*-* sparc*-*-* sh*-*-* tic6x-*-* } "*" "" } */
extern void abort (void);
#if (__SIZEOF_INT__ <= 2)
diff --git gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index ed81e80..3056245 100644
--- gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -10,6 +10,7 @@
avr: Variadic funcs don't pass arguments in registers, while normal funcs
do. */
/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { avr-*-* } } "*" "" } */
+/* { dg-skip-if "Variadic funcs arguments will push by caller for current nds32 porting." { nds32*-*-* } } */
#define INTEGER_ARG 5
diff --git gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
index 470b585..8518dfb 100644
--- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+++ gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
@@ -33,5 +33,5 @@ void test55 (int x, int y)
that the && should be emitted (based on BRANCH_COST). Fix this
by teaching dom to look through && and register all components
as true. */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* sparc*-*-* spu-*-* x86_64-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* sparc*-*-* spu-*-* x86_64-*-*" } } } } */
/* { dg-final { cleanup-tree-dump "optimized" } } */
diff --git gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
index a64987b..d6b03a3 100644
--- gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
+++ gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
+/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* nds32*-*-* powerpc*-*-* xtensa*-*-*"} } } */
/* { dg-options "-O2 -fdump-tree-forwprop1" } */
extern char *frob (void);
diff --git gcc/testsuite/gcc.dg/tree-ssa/pr42585.c gcc/testsuite/gcc.dg/tree-ssa/pr42585.c
index bea5549..a970c855 100644
--- gcc/testsuite/gcc.dg/tree-ssa/pr42585.c
+++ gcc/testsuite/gcc.dg/tree-ssa/pr42585.c
@@ -35,6 +35,6 @@ Cyc_string_ungetc (int ignore, struct _fat_ptr *sptr)
/* Whether the structs are totally scalarized or not depends on the
MOVE_RATIO macro definition in the back end. The scalarization will
not take place when using small values for MOVE_RATIO. */
-/* { dg-final { scan-tree-dump-times "struct _fat_ptr _ans" 0 "optimized" { target { ! "arm*-*-* avr-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
-/* { dg-final { scan-tree-dump-times "struct _fat_ptr _T2" 0 "optimized" { target { ! "arm*-*-* avr-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "struct _fat_ptr _ans" 0 "optimized" { target { ! "arm*-*-* avr-*-* nds32*-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "struct _fat_ptr _T2" 0 "optimized" { target { ! "arm*-*-* avr-*-* nds32*-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
/* { dg-final { cleanup-tree-dump "optimized" } } */
diff --git gcc/testsuite/gcc.dg/tree-ssa/sra-12.c gcc/testsuite/gcc.dg/tree-ssa/sra-12.c
index 1ad3f49..59e5e6a 100644
--- gcc/testsuite/gcc.dg/tree-ssa/sra-12.c
+++ gcc/testsuite/gcc.dg/tree-ssa/sra-12.c
@@ -21,5 +21,5 @@ int foo (struct S *p)
*p = l;
}
-/* { dg-final { scan-tree-dump-times "l;" 0 "release_ssa" { target { ! "avr*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "l;" 0 "release_ssa" { target { ! "avr*-*-* nds32*-*-*" } } } } */
/* { dg-final { cleanup-tree-dump "release_ssa" } } */
diff --git gcc/testsuite/gcc.target/nds32/basic-main.c gcc/testsuite/gcc.target/nds32/basic-main.c
new file mode 100644
index 0000000..a852b6e
--- /dev/null
+++ gcc/testsuite/gcc.target/nds32/basic-main.c
@@ -0,0 +1,9 @@
+/* This is a basic main function test program. */
+
+/* { dg-do run { target nds32*-*-* } } */
+/* { dg-options "-O0" } */
+
+int main(void)
+{
+ return 0;
+}
diff --git gcc/testsuite/gcc.target/nds32/builtin-isb.c gcc/testsuite/gcc.target/nds32/builtin-isb.c
new file mode 100644
index 0000000..a080320
--- /dev/null
+++ gcc/testsuite/gcc.target/nds32/builtin-isb.c
@@ -0,0 +1,11 @@
+/* Verify that we generate isb instruction with builtin function. */
+
+/* { dg-do compile { target nds32*-*-* } } */
+/* { dg-options "-O0" } */
+/* { dg-final { scan-assembler "\\tisb" } } */
+
+void
+test (void)
+{
+ __builtin_nds32_isb ();
+}
diff --git gcc/testsuite/gcc.target/nds32/builtin-isync.c gcc/testsuite/gcc.target/nds32/builtin-isync.c
new file mode 100644
index 0000000..12676af
--- /dev/null
+++ gcc/testsuite/gcc.target/nds32/builtin-isync.c
@@ -0,0 +1,12 @@
+/* Verify that we generate isync instruction with builtin function. */
+
+/* { dg-do compile { target nds32*-*-* } } */
+/* { dg-options "-O0" } */
+/* { dg-final { scan-assembler "\\tisync" } } */
+
+void
+test (void)
+{
+ int *addr = (int *) 0x53000000;
+ __builtin_nds32_isync (addr);
+}
diff --git gcc/testsuite/gcc.target/nds32/builtin-mfsr-mtsr.c gcc/testsuite/gcc.target/nds32/builtin-mfsr-mtsr.c
new file mode 100644
index 0000000..f68ea6d
--- /dev/null
+++ gcc/testsuite/gcc.target/nds32/builtin-mfsr-mtsr.c
@@ -0,0 +1,17 @@
+/* Verify that we generate mfsr/mtsr instruction with builtin function. */
+
+/* { dg-do compile { target nds32*-*-* } } */
+/* { dg-options "-O0" } */
+/* { dg-final { scan-assembler "\\tmfsr" } } */
+/* { dg-final { scan-assembler "\\tmtsr" } } */
+
+#include <nds32_intrinsic.h>
+
+void
+test (void)
+{
+ int ipsw_value;
+
+ ipsw_value = __builtin_nds32_mfsr (__NDS32_REG_IPSW__);
+ __builtin_nds32_mtsr (ipsw_value, __NDS32_REG_IPSW__);
+}
diff --git gcc/testsuite/gcc.target/nds32/builtin-mfusr-mtusr.c gcc/testsuite/gcc.target/nds32/builtin-mfusr-mtusr.c
new file mode 100644
index 0000000..f24942e
--- /dev/null
+++ gcc/testsuite/gcc.target/nds32/builtin-mfusr-mtusr.c
@@ -0,0 +1,17 @@
+/* Verify that we generate mfusr/mtusr instruction with builtin function. */
+
+/* { dg-do compile { target nds32*-*-* } } */
+/* { dg-options "-O0" } */
+/* { dg-final { scan-assembler "\\tmfusr" } } */
+/* { dg-final { scan-assembler "\\tmtusr" } } */
+
+#include <nds32_intrinsic.h>
+
+void
+test (void)
+{
+ int itype_value;
+
+ itype_value = __builtin_nds32_mfusr (__NDS32_REG_ITYPE__);
+ __builtin_nds32_mtusr (itype_value, __NDS32_REG_ITYPE__);
+}
diff --git gcc/testsuite/gcc.target/nds32/builtin-setgie-dis.c gcc/testsuite/gcc.target/nds32/builtin-setgie-dis.c
new file mode 100644
index 0000000..634605f
--- /dev/null
+++ gcc/testsuite/gcc.target/nds32/builtin-setgie-dis.c
@@ -0,0 +1,11 @@
+/* Verify that we generate setgie.d instruction with builtin function. */
+
+/* { dg-do compile { target nds32*-*-* } } */
+/* { dg-options "-O0" } */
+/* { dg-final { scan-assembler "\\tsetgie.d" } } */
+
+void
+test (void)
+{
+ __builtin_nds32_setgie_dis ();
+}
diff --git gcc/testsuite/gcc.target/nds32/builtin-setgie-en.c gcc/testsuite/gcc.target/nds32/builtin-setgie-en.c
new file mode 100644
index 0000000..c0386c4
--- /dev/null
+++ gcc/testsuite/gcc.target/nds32/builtin-setgie-en.c
@@ -0,0 +1,11 @@
+/* Verify that we generate setgie.e instruction with builtin function. */
+
+/* { dg-do compile { target nds32*-*-* } } */
+/* { dg-options "-O0" } */
+/* { dg-final { scan-assembler "\\tsetgie.e" } } */
+
+void
+test (void)
+{
+ __builtin_nds32_setgie_en ();
+}
diff --git gcc/testsuite/gcc.target/nds32/nds32.exp gcc/testsuite/gcc.target/nds32/nds32.exp
new file mode 100644
index 0000000..e88d022
--- /dev/null
+++ gcc/testsuite/gcc.target/nds32/nds32.exp
@@ -0,0 +1,45 @@
+# Target test cases of Andes NDS32 cpu for GNU compiler
+# Copyright (C) 2012-2013 Free Software Foundation, Inc.
+# Contributed by Andes Technology Corporation.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't a nds32 target.
+if ![istarget nds32*-*-*] then {
+ return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+ set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
+ "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
diff --git gcc/testsuite/lib/target-supports.exp gcc/testsuite/lib/target-supports.exp
index 0905821..d464462 100644
--- gcc/testsuite/lib/target-supports.exp
+++ gcc/testsuite/lib/target-supports.exp
@@ -535,6 +535,7 @@ proc check_profiling_available { test_what } {
|| [istarget mmix-*-*]
|| [istarget mn10300-*-elf*]
|| [istarget moxie-*-elf*]
+ || [istarget nds32*-*-elf]
|| [istarget picochip-*-*]
|| [istarget powerpc-*-eabi*]
|| [istarget powerpc-*-elf]
More information about the Gcc-patches
mailing list