[PATCH] Vectorizing abs(char/short/int) on x86.

[Uros Bizjak]

Hello!

> Currently GCC could not vectorize abs() operation for integers on x86
> with only SSE2 support. For int type, the reason is that the expand on
> abs() is not defined for vector type. This patch defines such an
> expand so that abs(int) will be vectorized with only SSE2.

+(define_expand "abs<mode>2"
+  [(set (match_operand:VI124_AVX2_48_AVX512F 0 "register_operand")
+ (abs:VI124_AVX2_48_AVX512F
+  (match_operand:VI124_AVX2_48_AVX512F 1 "register_operand")))]
+  "TARGET_SSE2"
+{
+  if (TARGET_SSE2 && !TARGET_SSSE3)
+    ix86_expand_sse2_absvxsi2 (operands[0], operands[1]);
+  else if (TARGET_SSSE3)
+    emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+    gen_rtx_ABS (<MODE>mode, operands[1])));
+  DONE;
+})

This should be written as:

(define_expand "abs<mode>2"
  [(set (match_operand:VI124_AVX2_48_AVX512F 0 "register_operand")
   (abs:VI124_AVX2_48_AVX512F
     (match_operand:VI124_AVX2_48_AVX512F 1 "nonimmediate_operand")))]
  "TARGET_SSE2"
{
  if (!TARGET_SSSE3)
    {
      ix86_expand_sse2_absvxsi2 (operands[0], operands[1]);
      DONE;
    }
})

Please note that operands[1] can be a memory operand, so your expander
should either handle it (this is preferred) or load the operand to the
register at the beginning of the expansion.

+void
+ix86_expand_sse2_absvxsi2 (rtx op0, rtx op1)

This function name implies SImode operands ... please just name it
ix86_expand_sse2_abs.

Uros.