libgcc: AArch64: Check for correct signal insns on BE when unwinding
Matthew Leach
matthew.leach@arm.com
Tue Nov 26 20:57:00 GMT 2013
Hi,
When unwinding the stack, the unwind code checks for two opcodes that
denote a registrations of a signal handler. This is broken on BE as
the opcodes will be in the wrong byte-order as insns are always LE.
Add the correct checks when compiling for AArch64 big endian.
This has been tested with the glibc test "tst-backtrace4" and passes
with this patch applied.
Please note that I don't have commit access, if this is OK could
someone merge it for me?
Thanks,
Matt Leach
libgcc/
2013-11-26 Matthew Leach <matthew.leach@arm.com>
* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state):
Check for correct opcodes on BE.
diff --git a/libgcc/config/aarch64/linux-unwind.h b/libgcc/config/aarch64/linux-unwind.h
index fde4d14..9f30b87 100644
--- a/libgcc/config/aarch64/linux-unwind.h
+++ b/libgcc/config/aarch64/linux-unwind.h
@@ -25,6 +25,14 @@
#include <signal.h>
#include <sys/ucontext.h>
+#if __AARCH64EB__
+#define MOVZ_X8_8B 0x681180d2
+#define SVC_0 0x010000d4
+#else
+#define MOVZ_X8_8B 0xd2801168
+#define SVC_0 0xd4000001
+#endif
+
#define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state
static _Unwind_Reason_Code
@@ -55,7 +63,7 @@ aarch64_fallback_frame_state (struct _Unwind_Context *context,
0xd2801168 movz x8, #0x8b
0xd4000001 svc 0x0
*/
- if (pc[0] != 0xd2801168 || pc[1] != 0xd4000001)
+ if (pc[0] != MOVZ_X8_8B || pc[1] != SVC_0)
{
return _URC_END_OF_STACK;
}
--
1.7.9.5
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