[Patch, mips] MIPS performance patch for PR 56552

[Richard Sandiford]

"Steve Ellcey " <sellcey@mips.com> writes:
> diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
> index 0cda169..49c2bf7 100644
> --- a/gcc/config/mips/mips.md
> +++ b/gcc/config/mips/mips.md
> @@ -6721,7 +6721,7 @@
>  (define_insn "*mov<GPR:mode>_on_<MOVECC:mode>"
>    [(set (match_operand:GPR 0 "register_operand" "=d,d")
>  	(if_then_else:GPR
> -	 (match_operator:MOVECC 4 "equality_operator"
> +	 (match_operator 4 "equality_operator"
>  		[(match_operand:MOVECC 1 "register_operand" "<MOVECC:reg>,<MOVECC:reg>")
>  		 (const_int 0)])
>  	 (match_operand:GPR 2 "reg_or_0_operand" "dJ,0")

Sorry, I didn't notice this before, but we should remove "_on_<MOVECC:mode>"
from the name of the insn.  Same for the FP version.

OK with that change, thanks.

It'd be good to add a testcase too.  E.g. we could take your example in
the PR and check for the redundant 0xffff.

Richard