[AArch64] Remove v8type attribute.

[James Greenhalgh]

Now, every insn has a "type", we don't need v8type anymore.
This patch removes v8type.

Tested on aarch64-none-elf with no regression.

OK?

Thanks,
James

---
gcc/

2013-11-14  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64.md: Remove v8type from all insns.

---
For reference, to transform from v8type to type, the mapping is:

OLD
  NEW

adc
  adc_reg
  adc_imm
adcs
  adcs_reg
  adcs_imm
adr
  adr
alu
  alu_imm
  alu_reg
alu_ext
  alu_ext
alu_shift
  alu_shift_imm
  alu_shift_reg
alus
  alus_imm
  alus_reg
alus_ext
  alus_ext
alus_shift
  alus_shift_imm
  alus_shift_reg
bfm
  bfm
branch
  branch
call
  call
ccmp
  * unused *
clz
  clz
csel,
  csel
dmb
  * unused *
div
  sdiv
  udiv
div64
  * unused *
extend
  extend
extr
  * unused *
fpsimd_load
  f_loadd
fpsimd_load2
  neon_load1_2reg
fpsimd_store2
  neon_store1_2reg
fpsimd_store
  f_stored
fadd
  faddd
  fadds
fccmp
  * Unused *
fcvt
  f_cvt
fcvtf2i
  f_cvtf2i
fcvti2f
  f_cvti2f
fcmp
  fcmpd
  fcmps
fconst
  fconstd
  fconsts
fcsel
  fcsel
fdiv
  fdivd
  fdivs
ffarith
  ffarithd
  ffariths
fmadd
  fmacd
  fmacs
fminmax
  f_minmaxs
  f_minmaxd
fmov
  fmov
fmovf2i
  f_mrc
fmovi2f
  f_mcr
fmul
  fmuld
  fmuls
frint
  f_rintd
  f_rints
fsqrt
  fsqrts
  fsqrtd
load_acq
  load_acq
load1
  load1
load2
  load2
logic
  logic_reg
logic_imm
  logic_imm
logic_shift
  logic_shift_imm
  logic_shift_reg
logics
  logics_reg
logics_imm
  logics_imm
logics_shift
  logics_shift_imm
  logics_shift_reg
madd
  mla
  mlas
maddl
  umlal
  umlals
  smlal
  smlals
misc
  untyped/no_insn
move
move2
movk
movz
  mov_imm
  mov_reg
  mov_shift
  mov_shift_reg
  mvn_imm
  mvn_reg
  mvn_shift
  mvn_shift_reg
mrs
  mrs
mulh
mull
  umull
  smull
mult
  mul
  muls
prefetch
  * unused *
rbit
  rbit
rev
  rev
sdiv
  sdiv
shift
  shift_reg
shift_imm
  shift_imm
store_rel
  store_rel
store1
  store1
store2
  store2
udiv
  udiv
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