[ARM] Fix ICE in minipool handling at -Os

Eric Botcazou ebotcazou@adacore.com
Sat Mar 23 11:21:00 GMT 2013

We ran into an ICE at -Os on the 4.7 branch for ARM (BE/VFPv3/ARM):

FAIL: gcc.c-torture/compile/920928-2.c  -Os  (internal compiler error)

It's an assertion deep in the ARM back-end:

  /* If an insn doesn't have a range defined for it, then it isn't
     expecting to be reworked by this code.  Better to stop now than
     to generate duff assembly code.  */
  gcc_assert (fix->forwards || fix->backwards);

This happens for arm_zero_extendhisi2_v6, but I fail to see what is different 
for it from arm_extendhisi2_v6, which is expecting to be reworked.

Hence the attached patch, which copies attributes from arm_extendhisi2_v6 to 
arm_zero_extendhisi2_v6.  No regressions on ARM, OK for the mainline?

2013-03-23  Eric Botcazou  <ebotcazou@adacore.com>

	* config/arm/arm.md (arm_zero_extendhisi2): Add pool_range and
	neg_pool_range attributes.
	(arm_zero_extendhisi2_v6): Likewise.

Eric Botcazou
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