MIPS elimate trap-if-zero instruction if possible for divisions
Richard Sandiford
rdsandiford@googlemail.com
Tue Jul 9 17:31:00 GMT 2013
Graham Stott <graham.stott@btinternet.com> writes:
> Hi Richard, Jeff.
>
> Richard what's your idea for exposing things early enough so that VRP
> can eliminate the need for a trao-if-zero insn iif possible.
Well, I was thinking of doing it in expand. I.e. get the MIPS div*, mod*
and divmod* patterns to emit an explicit trap-if-zero or branch-around-
break sequence. (The div* and mod* patterns are in loongson.md.)
With Jeff's comment about VRP though, it sounds like he had different
ideas :-)
Richard
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