[PATCH, i386, PR57623] Introduce synonyms for BMI intrinsics
Kirill Yukhin
kirill.yukhin@gmail.com
Tue Jul 2 08:33:00 GMT 2013
Hello,
As mentioned by Uros [1], we have few intrinsics which described in
Intel Spec, but absent in bmiintin.h
Attached patch resolves this.
Bootstrap passing. Updated tests passing on BMI-featured HW.
ChangeLog:
2013-07-02 Kirill Yukhin <kirill.yukhin@intel.com>
* config/i386/bmiintrin.h (_blsi_u32): New.
(_blsi_u64): Ditto.
(_blsr_u32): Ditto.
(_blsr_u64): Ditto.
(_blsmsk_u32): Ditto.
(_blsmsk_u64): Ditto.
(_tzcnt_u32): Ditto.
(_tzcnt_u64): Ditto.
testsuite/ChangeLog:
2013-07-02 Kirill Yukhin <kirill.yukhin@intel.com>
* gcc.target/i386/bmi-1.c: Extend with new instrinsics.
Fix scan patterns.
* gcc.target/i386/bmi-2.c: Ditto.
[1] http://gcc.gnu.org/ml/gcc-patches/2013-06/msg01286.html
Thanks, K
-------------- next part --------------
commit 0e13925b9d79db6a6ddd5aa158c872be78351fae
Author: Kirill Yukhin <kirill.yukhin@intel.com>
Date: Fri Jun 28 11:29:06 2013 +0400
Adding symonim intrinsics.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 251de55..20aafc9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,16 @@
2013-06-28 Kirill Yukhin <kirill.yukhin@intel.com>
+ * config/i386/bmiintrin.h (_blsi_u32): New.
+ (_blsi_u64): Ditto.
+ (_blsr_u32): Ditto.
+ (_blsr_u64): Ditto.
+ (_blsmsk_u32): Ditto.
+ (_blsmsk_u64): Ditto.
+ (_tzcnt_u32): Ditto.
+ (_tzcnt_u64): Ditto.
+
+2013-06-28 Kirill Yukhin <kirill.yukhin@intel.com>
+
* config/i386/bmiintrin.h (_bextr_u32): New.
(_bextr_u64): Ditto.
diff --git a/gcc/config/i386/bmiintrin.h b/gcc/config/i386/bmiintrin.h
index 281ebaa..2323334 100644
--- a/gcc/config/i386/bmiintrin.h
+++ b/gcc/config/i386/bmiintrin.h
@@ -40,7 +40,6 @@ __tzcnt_u16 (unsigned short __X)
return __builtin_ctzs (__X);
}
-
extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__andn_u32 (unsigned int __X, unsigned int __Y)
{
@@ -66,17 +65,34 @@ __blsi_u32 (unsigned int __X)
}
extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_blsi_u32 (unsigned int __X)
+{
+ return __blsi_u32 (__X);
+}
+
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__blsmsk_u32 (unsigned int __X)
{
return __X ^ (__X - 1);
}
extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_blsmsk_u32 (unsigned int __X)
+{
+ return __blsmsk_u32 (__X);
+}
+
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__blsr_u32 (unsigned int __X)
{
return __X & (__X - 1);
}
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_blsr_u32 (unsigned int __X)
+{
+ return __blsr_u32 (__X);
+}
extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__tzcnt_u32 (unsigned int __X)
@@ -84,6 +100,12 @@ __tzcnt_u32 (unsigned int __X)
return __builtin_ctz (__X);
}
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_tzcnt_u32 (unsigned int __X)
+{
+ return __builtin_ctz (__X);
+}
+
#ifdef __x86_64__
extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
@@ -111,23 +133,47 @@ __blsi_u64 (unsigned long long __X)
}
extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_blsi_u64 (unsigned long long __X)
+{
+ return __blsi_u64 (__X);
+}
+
+extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__blsmsk_u64 (unsigned long long __X)
{
return __X ^ (__X - 1);
}
extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_blsmsk_u64 (unsigned long long __X)
+{
+ return __blsmsk_u64 (__X);
+}
+
+extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__blsr_u64 (unsigned long long __X)
{
return __X & (__X - 1);
}
extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_blsr_u64 (unsigned long long __X)
+{
+ return __blsr_u64 (__X);
+}
+
+extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__tzcnt_u64 (unsigned long long __X)
{
return __builtin_ctzll (__X);
}
+extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_tzcnt_u64 (unsigned long long __X)
+{
+ return __builtin_ctzll (__X);
+}
+
#endif /* __x86_64__ */
#ifdef __DISABLE_BMI__
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index edf4df4..cb744f8 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,8 +1,14 @@
2013-06-28 Kirill Yukhin <kirill.yukhin@intel.com>
+ * gcc.target/i386/bmi-1.c: Extend with new instrinsics.
+ Fix scan patterns.
+ * gcc.target/i386/bmi-2.c: Ditto.
+
+2013-06-28 Kirill Yukhin <kirill.yukhin@intel.com>
+
* gcc.target/i386/bmi-1.c: Extend with new instrinsic.
Fix scan patterns.
- * gcc.target/i386/bmi-1.c: Ditto.
+ * gcc.target/i386/bmi-2.c: Ditto.
* gcc.target/i386/bmi-bextr-4.c: New.
* gcc.target/i386/bmi-bextr-5.c: Ditto.
diff --git a/gcc/testsuite/gcc.target/i386/bmi-1.c b/gcc/testsuite/gcc.target/i386/bmi-1.c
index a05cb27..c66a9d8 100644
--- a/gcc/testsuite/gcc.target/i386/bmi-1.c
+++ b/gcc/testsuite/gcc.target/i386/bmi-1.c
@@ -2,10 +2,10 @@
/* { dg-options "-O2 -mbmi " } */
/* { dg-final { scan-assembler "andn\[^\\n]*eax" } } */
/* { dg-final { scan-assembler-times "bextr\[ \\t]+\[^\\n]*eax" 2 } } */
-/* { dg-final { scan-assembler "blsi\[^\\n]*eax" } } */
-/* { dg-final { scan-assembler "blsmsk\[^\\n]*eax" } } */
-/* { dg-final { scan-assembler "blsr\[^\\n]*eax" } } */
-/* { dg-final { scan-assembler "tzcntl\[^\\n]*eax" } } */
+/* { dg-final { scan-assembler-times "blsi\[^\\n]*eax" 2 } } */
+/* { dg-final { scan-assembler-times "blsmsk\[^\\n]*eax" 2 } } */
+/* { dg-final { scan-assembler-times "blsr\[^\\n]*eax" 2 } } */
+/* { dg-final { scan-assembler-times "tzcntl\[^\\n]*eax" 2 } } */
#include <x86intrin.h>
@@ -36,19 +36,43 @@ func_blsi32 (unsigned int X)
}
unsigned int
+func_blsi32_2 (unsigned int X)
+{
+ return _blsi_u32(X);
+}
+
+unsigned int
func_blsmsk32 (unsigned int X)
{
return __blsmsk_u32(X);
}
unsigned int
+func_blsmsk32_2 (unsigned int X)
+{
+ return _blsmsk_u32(X);
+}
+
+unsigned int
func_blsr32 (unsigned int X)
{
return __blsr_u32(X);
}
unsigned int
+func_blsr32_2 (unsigned int X)
+{
+ return _blsr_u32(X);
+}
+
+unsigned int
func_tzcnt32 (unsigned int X)
{
return __tzcnt_u32(X);
}
+
+unsigned int
+func_tzcnt32_2 (unsigned int X)
+{
+ return _tzcnt_u32(X);
+}
diff --git a/gcc/testsuite/gcc.target/i386/bmi-2.c b/gcc/testsuite/gcc.target/i386/bmi-2.c
index 68d06a2..6eea66a 100644
--- a/gcc/testsuite/gcc.target/i386/bmi-2.c
+++ b/gcc/testsuite/gcc.target/i386/bmi-2.c
@@ -2,10 +2,10 @@
/* { dg-options "-O2 -mbmi " } */
/* { dg-final { scan-assembler "andn\[^\\n]*rax" } } */
/* { dg-final { scan-assembler-times "bextr\[ \\t]+\[^\\n]*rax" 2 } } */
-/* { dg-final { scan-assembler "blsi\[^\\n]*rax" } } */
-/* { dg-final { scan-assembler "blsmsk\[^\\n]*rax" } } */
-/* { dg-final { scan-assembler "blsr\[^\\n]*rax" } } */
-/* { dg-final { scan-assembler "tzcntq\[^\\n]*rax" } } */
+/* { dg-final { scan-assembler-times "blsi\[^\\n]*rax" 2 } } */
+/* { dg-final { scan-assembler-times "blsmsk\[^\\n]*rax" 2 } } */
+/* { dg-final { scan-assembler-times "blsr\[^\\n]*rax" 2 } } */
+/* { dg-final { scan-assembler-times "tzcntq\[^\\n]*rax" 2 } } */
#include <x86intrin.h>
@@ -36,19 +36,43 @@ func_blsi64 (unsigned long long X)
}
unsigned long long
+func_blsi64_2 (unsigned long long X)
+{
+ return _blsi_u64 (X);
+}
+
+unsigned long long
func_blsmsk64 (unsigned long long X)
{
return __blsmsk_u64 (X);
}
unsigned long long
+func_blsmsk64_2 (unsigned long long X)
+{
+ return _blsmsk_u64 (X);
+}
+
+unsigned long long
func_blsr64 (unsigned long long X)
{
return __blsr_u64 (X);
}
unsigned long long
+func_blsr64_2 (unsigned long long X)
+{
+ return _blsr_u64 (X);
+}
+
+unsigned long long
func_tzcnt64 (unsigned long long X)
{
return __tzcnt_u64 (X);
}
+
+unsigned long long
+func_tzcnt64_2 (unsigned long long X)
+{
+ return _tzcnt_u64 (X);
+}
More information about the Gcc-patches
mailing list