[GCC 4.8 wwwdocs] PATCH: Mention several user-visible changes for x86
Mon Feb 18 06:28:00 GMT 2013
Thanks a lot for your remarks!
Below is updated patch which will be checked in.
On Mon, Feb 18, 2013 at 3:07 AM, Gerald Pfeifer <email@example.com> wrote:
> On Fri, 15 Feb 2013, Igor Zamyatin wrote:
>> Is it ok for wwwdocs?
> Index: htdocs/gcc-4.8/changes.html
> + <li>Support for the new Intel processor codename Broadwell with RDSEED,
> + ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
> + <code>-mprfchw</code>, <code>-mrdseed</code>.
> Can you make this <code>RDSEED</code>, <code>... and so forth?
> (This is a bit borderline, in that one could also see this as
> more general references, but usually we mark those up.)
> And "...through the ... command-line options."?
> + <li> Support for Intel RTM and HLE intrinsics, built-in
> "the ... intrinsics" (and same below for "instruction sets")
> + <li> x86 backend was improved to allow option
> <code>-fscedule-insns</code> to work reliably.
> "The x86 backend has been improved..."
> + This option can be used to schedule instructions better and can
> lead to improved performace in certain cases.
> This line is quite long, can you break lines around 76 columns?
> And, let's be a bit more brave and omit either "can" or "in certain
> cases". Otherwise this may sounds too unlikely. :-)
> The patch is fine with changes along the lines described above.
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
retrieving revision 1.95
diff -c -r1.95 changes.html
*** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000 1.95
--- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
*** 460,465 ****
--- 460,471 ----
wrong results. You must build all
modules with <code>-mpreferred-stack-boundary=3</code>, including any
libraries. This includes the system libraries and startup modules.</li>
+ <li>Support for the new Intel processor codename Broadwell with
+ <code>RDSEED</code>, <code>ADCX</code>, <code>ADOX</code>,
+ <code>PREFETCHW</code> is available through <code>-madx</code>,
+ <code>-mprfchw</code>, <code>-mrdseed</code> command-line options.
+ <li> Support for the Intel RTM and HLE intrinsics, built-in
functions and code generation is available via <code>-mrtm</code> and
+ <li> Support for the Intel FXSR, XSAVE and XSAVEOPT instruction
sets. Intrinsics and built-in functions are available
+ via <code>-mfxsr</code>, <code>-mxsave</code> and
<li> New built-in functions to detect run-time CPU type and ISA:
<li>A built-in function <code>__builtin_cpu_is</code> has
been added to
*** 524,529 ****
--- 530,538 ----
+ <li> The x86 backend has been improved to allow option
<code>-fscedule-insns</code> to work reliably.
+ This option can be used to schedule instructions better and leads to
+ improved performace in certain cases.
<li> Windows MinGW-w64 targets (<code>*-w64-mingw*</code>)
require at least r5437 from the Mingw-w64 trunk. </li>
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