[GCC 4.8 changes] PATCH: Mention several user-visible changes for x86

Uros Bizjak ubizjak@gmail.com
Wed Feb 13 11:21:00 GMT 2013


On Wed, Feb 13, 2013 at 12:17 PM, Igor Zamyatin <izamyatin@gmail.com> wrote:
>>
>> Please also mention new -mfxsr, -mxsave and -mxsaveopt options.
>>
>>>       <li> New built-in functions to detect run-time CPU type and ISA:
>>>       <ul>
>>>         <li>A built-in function <code>__builtin_cpu_is</code> has been added to
>>> ***************
>>> *** 524,529 ****
>>> --- 530,538 ----
>>>       <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
>>> for more
>>>       information.
>>>       </li>
>>> +     <li> Problem with instability of pre-reload scheduler on x86
>>> targets was fixed. Now option -fschedule-insn
>>> +     can be used loosely to reach better performance.
>>
>> "used loosely" in what sense?
>>
>> Thanks,
>> Uros.
>
> Updated version. Does it look ok?

Looks OK to me. I have CC'd Gerald for a grammar and style check.

Thanks,
Uros.

>
>
> Thanks,
> Igor
>
> Index: htdocs/gcc-4.8/changes.html
> ===================================================================
> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
> retrieving revision 1.95
> diff -c -r1.95 changes.html
> *** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000      1.95
> --- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
> ***************
> *** 460,465 ****
> --- 460,471 ----
>       wrong results.  You must build all
>       modules with <code>-mpreferred-stack-boundary=3</code>, including any
>       libraries.  This includes the system libraries and startup modules.</li>
> +     <li>Support for the new Intel processor codename Broadwell with RDSEED,
> +     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
> +     <code>-mprfchw</code>, <code>-mrdseed</code>.
> +     </li>
> +     <li> Support for Intel RTM and HLE intrinsics, built-in
> functions and code generation is available via <code>-mrtm</code> and
> <code>-mhle</code>.
> +     </li>
> +     <li> Support for Intel FXSR, XSAVE and XSAVEOPT instruction
> sets. Intrinsics and built-in functions are available
> +     via <code>-mfxsr</code>, <code>-mxsave</code> and
> <code>-mxsaveopt</code> respectively.
> +     </li>
>       <li> New built-in functions to detect run-time CPU type and ISA:
>       <ul>
>         <li>A built-in function <code>__builtin_cpu_is</code> has been added to
> ***************
> *** 524,529 ****
> --- 530,538 ----
>       <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
> for more
>       information.
>       </li>
> +     <li> x86 backend was improved to allow option
> <code>-fscedule-insns</code> to work reliably.
> +     This option can be used to schedule instructions better and can
> lead to improved performace in certain cases.
> +     </li>
>       <li> Windows MinGW-w64 targets (<code>*-w64-mingw*</code>)
> require at least r5437 from the Mingw-w64 trunk. </li>
>     </ul>



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