[AArch64] Fix vld1<q>_* asm constraints in arm_neon.h

[Marcus Shawcroft]

On 24/04/13 16:09, Marcus Shawcroft wrote:
> On 24/04/13 15:34, James Greenhalgh wrote:
>> Hi,
>>
>> The vld1<q>_* patterns in arm_neon.h did not correctly describe
>> their register/memory constraints. This could lead to incorrect
>> code generation where they were used.
>>
>> This patch fixes the bug by giving the patterns the correct
>> register constraints.
>>
>> Regression tested on aarch64-none-elf without regressions.
>>
>> OK?
>>
>> Thanks,
>> James Greenhalgh
>>
>> ---
>> gcc/
>>
>> 2013-04-24  James Greenhalgh  <james.greenhalgh@arm.com>
>>
>> 	* config/aarch64/arm_neon.h (vld1<q>_lane*): Fix constraints.
>> 	(vld1<q>_dup_<sufp><8, 16, 32, 64>): Likewise.
>> 	(vld1<q>_<sufp><8, 16, 32, 64>): Likewise.
>>
>
> OK
> /Marcus
>
>

and backport to 4.8 and arm/4.7 please.
/Marcus