[PATCH][ARM] use vsel instruction for floating point conditional moves in ARMv8

[Matthew Gretton-Dann]

Would it be possible for this patch and the others Kyrylo has recently done 
for the new ARMv8 AArch32 instructions to be backported to 4.8?

In particular I'm refering to:

http://gcc.gnu.org/ml/gcc-patches/2013-03/msg00994.html (trunk r197052)
http://gcc.gnu.org/ml/gcc-patches/2013-03/msg00874.html (trunk r197051)
http://gcc.gnu.org/ml/gcc-patches/2013-03/msg00873.html (trunk r197046)
http://gcc.gnu.org/ml/gcc-patches/2013-03/msg00652.html (trunk r197040 and 
197041)

Thanks,

Matt


On 25/03/13 15:21, Kyrylo Tkachov wrote:
>> -----Original Message-----
>> From: Ramana Radhakrishnan
>> Sent: 18 February 2013 11:51
>> To: Kyrylo Tkachov
>> Cc: gcc-patches@gcc.gnu.org; Richard Earnshaw
>> Subject: Re: [PATCH][ARM] use vsel instruction for floating point
>> conditional moves in ARMv8
>>
>> On 01/30/13 09:24, Kyrylo Tkachov wrote:
>>> Hi all,
>>> This patch uses the new ARMv8 AArch32 vsel instruction to implement
>>> conditional moves of floating point numbers.
>>> For example, an instruction of the form:
>>> 	vsel<cond>.f32  s0, s1, s2
>>> means
>>> 	s0 := cond ? s1 : s2
>>>
>>> This can be useful, among other places, in Thumb2 because it doesn't
>> require
>>> an enclosing IT block.
>>> A small catch: The condition code used in vsel can only be one of
>> {GE, GT,
>>> EQ, VS}. If we want to use their negations {LT, LE, NE, VC} we just
>> flip the
>>> source operands.
>>> A new predicate is introduced that checks that the comparison yields
>> an ARM
>>> condition code in the set {GE, GT, EQ, VS, LT, LE, NE, VC}.
>>>
>>> New compilation tests are added. They pass on a model and no new
>> regressions
>>> on arm-none-eabi with qemu.
>>
>>>
>>> Ok for trunk?
>>
>> Ok for stage1 4.9.
>
> Hi Ramana,
>
> Thanks for the review.
> Re-tested on arm-none-eabi against current trunk and applied as r197052.
>
>>
>> Ramana
>
> Thanks,
> Kyrill
>>
>>>
>>> Thanks,
>>> Kyrill
>>>
>>> gcc/ChangeLog
>>>
>>> 2013-01-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>>>
>>> 	* config/arm/arm.md (f_sels, f_seld): New types.
>>> 	(*cmov<mode>): New pattern.
>>> 	* config/arm/predicates.md (arm_vsel_comparison_operator): New
>>> predicate.
>>>
>>>
>>> gcc/testsuite/ChangeLog
>>>
>>> 2013-01-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>>>
>>> 	* gcc.target/arm/vseleqdf.c: New test.
>>> 	* gcc.target/arm/vseleqsf.c: Likewise.
>>> 	* gcc.target/arm/vselgedf.c: Likewise.
>>> 	* gcc.target/arm/vselgesf.c: Likewise.
>>> 	* gcc.target/arm/vselgtdf.c: Likewise.
>>> 	* gcc.target/arm/vselgtsf.c: Likewise.
>>> 	* gcc.target/arm/vselledf.c: Likewise.
>>> 	* gcc.target/arm/vsellesf.c: Likewise.
>>> 	* gcc.target/arm/vselltdf.c: Likewise.
>>> 	* gcc.target/arm/vselltsf.c: Likewise.
>>> 	* gcc.target/arm/vselnedf.c: Likewise.
>>> 	* gcc.target/arm/vselnesf.c: Likewise.
>>> 	* gcc.target/arm/vselvcdf.c: Likewise.
>>> 	* gcc.target/arm/vselvcsf.c: Likewise.
>>> 	* gcc.target/arm/vselvsdf.c: Likewise.
>>> 	* gcc.target/arm/vselvssf.c: Likewise.
>>>
>
>
>
>


-- 
Matthew Gretton-Dann
Toolchain Working Group, Linaro