[PATCH] Don't bypass blocks with multiple latch edges (PR middle-end/54838)
Eric Botcazou
ebotcazou@adacore.com
Wed Nov 28 09:55:00 GMT 2012
> We then end up with
> Redirecting fallthru edge 3->4 to 6
> JUMP-BYPASS: Proved reg 59 in jump_insn 15 equals constant (const_int 1
> [0x1]) Bypass edge from 3->4 to 6
> Redirecting fallthru edge 9->4 to 5
> JUMP-BYPASS: Proved reg 59 in jump_insn 15 equals constant (const_int 3
> [0x3]) Bypass edge from 9->4 to 5
> i.e., it is assumed that in one reg there "are" two constants, that can't
> be right, right?!
No, I don't think that's the problem. The above messages are admittedly a bit
terse, they should say:
JUMP-BYPASS: Proved reg 59 in jump_insn 15 equals constant (const_int 3 [0x3])
when BB 4 is entered from BB 9. Redirect edge 9->4 to 5.
so you can have different constants for BB 3 and BB 9. The patch to tweak the
dump messages along these lines is pre-approved.
The ICE in merge_latch_edges means that the loop structure and the CFG aren't
in sync anymore. Does the cprop pass modify the former without declaring it?
--
Eric Botcazou
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