sched-deps patch: Fix PR54580

Bernd Schmidt bernds@codesourcery.com
Tue Nov 6 20:58:00 GMT 2012


If we have

i1: [r1 + 24] = x
i2: r1 = r1 + 24;
i3: y = [r1]

then, if not using cselib, we do not generate a dependency between i3
and i1, since we compare memory addresses [r1] and [r1 + 24]. This is
somewhat lame, but safe since i2 depends on i1 and i3 depends on i2.
However, it breaks with the new optimization I've recently added, which
allows us to switch i3 and i2 by modifying the address in i3. We can end
up with
i3: y = [r1 + 24]
i1: [r1 + 24] = x
i2: r1 = r1 + 24
which is incorrect.

The following patch is a conservative way of fixing this by simply
transferring all backwards dependencies from i2 to i3. I thought about
trying to do better when using cselib for a while, but I wasn't quite
certain how flush_pending_lists would interact with this, and it almost
certainly doesn't really matter.

Bootstrapped and tested on x86_64-linux (boehm-gc.c/gctest.c appears to
fail randomly, otherwise no changes). Ok?


Bernd
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