[Patch,AVR]: Fix PR50447 (2/n)

[Richard Henderson]

On 09/23/2011 02:10 AM, Paolo Bonzini wrote:
> On 09/23/2011 10:56 AM, Paolo Bonzini wrote:
>> Also, I am curious about one thing: while this is of course a very
>> pragmatic solution, you could also convert AVR to get rid of CC0, do
>> this at expansion time, and get split-wide-types to work as intended.
>>
>> compare-elim.c makes it relatively easy to remove CC0 nowadays.
> 
> For example, a two-byte add can be written as
> 
>    (set (reg:QI L1) (plus:QI (reg:QI L2) (reg:QI L3)))
>    (set (reg:QI H1) (plus:QI
>                     (plus:QI (req:QI H2) (reg:QI H3))
>                     (ltu:QI  (reg:QI L1) (reg:QI L3))))
> 
> After reload the second instruction can be split to
> 
>   (set (reg:CC_C CC) (compare:QI (reg:QI L1) (reg:QI L3)))
>   (set (reg:QI   H1) (plus:QI
>                      (plus:QI    (req:QI   H2) (reg:QI H3))
>                      (lt:QI      (reg:CC_C CC) (const_int 0))))
> 
> (i.e. cp+adc).  compare-elim will then be able to turn this into add+adc:
> 
>   [parallel
>     (set (reg:QI   L1) (plus:QI    (reg:QI L2) (reg:QI L3)))
>     (set (reg:CC_C CC) (compare:QI
>                        (plus:QI    (reg:QI L2) (reg:QI L3))
>                                    (reg:QI L3))))]
>   (set (reg:QI H1) (plus:QI
>                    (plus:QI (req:QI   H2) (reg:QI H3))
>                    (lt:QI   (reg:CC_C CC) (const_int 0))))

It's very hard to get this right for AVR.  Certainly split-wide-types
won't be able to do it.  Because (annoyingly) AVR does have a set of
HImode arithmetic insns that only operate on the "d" register class.
So we can't do all the mode splitting that one would like split-wide-
types to handle until after reload.

As for cc0, to me to looks like having AVR expose the flags register
is not too useful.  If we get to the point where AVR is the only
remaining cc0 target, we can convert it to use only cbranch.  After
all, it already implements its own compare-elim-alike pass in md_reorg.


r~