Handle multi-word regsiters in REG_CFA_RESTORE notes

[Richard Sandiford]

Bernd Schmidt <bernds@codesourcery.com> writes:
> On 09/21/11 19:33, Richard Henderson wrote:
>> Why, then, is this the only place in dwarf2cfi that needs to handle
>> registers via a loop over nregs?  It seems to me that we should either
>> be handling multi-register spans everywhere or nowhere.
>> 
>> Because alternately, this could be a bug in your backend that you
>> failed to add two RESTORE notes instead of just one...
>
> Well, changing the backend works too. Patch below.
>
>
> Bernd
>
> 	* mips.c (mips_restore_reg): Split multiword registers for
> 	REG_CFA_RESTORE notes.
>
> Index: gcc/config/mips/mips.c
> ===================================================================
> --- gcc/config/mips/mips.c	(revision 178847)
> +++ gcc/config/mips/mips.c	(working copy)
> @@ -10286,16 +10286,28 @@ mips_epilogue_set_cfa (rtx reg, HOST_WID
>  static void
>  mips_restore_reg (rtx reg, rtx mem)
>  {
> +  enum machine_mode mode = GET_MODE (reg);
> +  unsigned regno = REGNO (reg);
> +
>    /* There's no MIPS16 instruction to load $31 directly.  Load into
>       $7 instead and adjust the return insn appropriately.  */
> -  if (TARGET_MIPS16 && REGNO (reg) == RETURN_ADDR_REGNUM)
> -    reg = gen_rtx_REG (GET_MODE (reg), GP_REG_FIRST + 7);
> +  if (TARGET_MIPS16 && regno == RETURN_ADDR_REGNUM)
> +    reg = gen_rtx_REG (mode, GP_REG_FIRST + 7);
> +  else if (GET_MODE_SIZE (mode) != 8 || !mips_split_64bit_move_p (reg, mem))
> +    mips_epilogue.cfa_restores
> +      = alloc_reg_note (REG_CFA_RESTORE, reg, mips_epilogue.cfa_restores);
>    else
> -    mips_epilogue.cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
> -						 mips_epilogue.cfa_restores);
> +    {
> +      rtx word1 = mips_subword (reg, true);
> +      rtx word2 = mips_subword (reg, false);
> +      mips_epilogue.cfa_restores
> +	= alloc_reg_note (REG_CFA_RESTORE, word1, mips_epilogue.cfa_restores);
> +      mips_epilogue.cfa_restores
> +	= alloc_reg_note (REG_CFA_RESTORE, word2, mips_epilogue.cfa_restores);
> +    }

I think the condition ought to match that in mips_save_reg:

static void
mips_save_reg (rtx reg, rtx mem)
{
  if (GET_MODE (reg) == DFmode && !TARGET_FLOAT64)
    {
      rtx x1, x2;

      if (mips_split_64bit_move_p (mem, reg))
	mips_split_doubleword_move (mem, reg);
      else
	mips_emit_move (mem, reg);

      x1 = mips_frame_set (mips_subword (mem, false),
			   mips_subword (reg, false));
      x2 = mips_frame_set (mips_subword (mem, true),
			   mips_subword (reg, true));
      mips_set_frame_expr (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, x1, x2)));
    }
  else
    mips_emit_save_slot_move (mem, reg, MIPS_PROLOGUE_TEMP (GET_MODE (reg)));
}

The store itself can still be a single SDC1 instruction, so we should
generate the same notes regardless of mips_split_64bit_move_p.

If that's right, then how about the patch below (tested on
mips64-linux-gnu, but without the shrink-wrap patches)?

Richard


gcc/
2011-09-25  Bernd Schmidt  <bernds@codesourcery.com>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* config/mips/mips.c (mips_add_cfa_restore): New function.
	(mips16e_save_restore_reg): Use it.
	(mips_restore_reg): Likewise.  Split double FPRs for
	REG_CFA_RESTORE notes.

Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c	2011-09-25 18:16:38.000000000 +0100
+++ gcc/config/mips/mips.c	2011-09-25 18:19:15.000000000 +0100
@@ -8202,6 +8202,15 @@ mips_frame_set (rtx mem, rtx reg)
 
   return set;
 }
+
+/* Record that the epilogue has restored call-saved register REG.  */
+
+static void
+mips_add_cfa_restore (rtx reg)
+{
+  mips_epilogue.cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
+					       mips_epilogue.cfa_restores);
+}
 
 /* If a MIPS16e SAVE or RESTORE instruction saves or restores register
    mips16e_s2_s8_regs[X], it must also save the registers in indexes
@@ -8393,8 +8402,7 @@ mips16e_save_restore_reg (bool restore_p
   reg = gen_rtx_REG (SImode, regno);
   if (restore_p)
     {
-      mips_epilogue.cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
-						   mips_epilogue.cfa_restores);
+      mips_add_cfa_restore (reg);
       return gen_rtx_SET (VOIDmode, reg, mem);
     }
   if (reg_parm_p)
@@ -10290,9 +10298,13 @@ mips_restore_reg (rtx reg, rtx mem)
      $7 instead and adjust the return insn appropriately.  */
   if (TARGET_MIPS16 && REGNO (reg) == RETURN_ADDR_REGNUM)
     reg = gen_rtx_REG (GET_MODE (reg), GP_REG_FIRST + 7);
+  else if (GET_MODE (reg) == DFmode && !TARGET_FLOAT64)
+    {
+      mips_add_cfa_restore (mips_subword (reg, true));
+      mips_add_cfa_restore (mips_subword (reg, false));
+    }
   else
-    mips_epilogue.cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
-						 mips_epilogue.cfa_restores);
+    mips_add_cfa_restore (reg);
 
   mips_emit_save_slot_move (reg, mem, MIPS_EPILOGUE_TEMP (GET_MODE (reg)));
   if (REGNO (reg) == REGNO (mips_epilogue.cfa_reg))