[PATCH, i386, PR50766] Fix incorrect mem/reg operands order

Kirill Yukhin kirill.yukhin@gmail.com
Thu Oct 20 07:36:00 GMT 2011


Thank you guys,
Updated patch is attached. Test fails wihout and passing with the fix.

ChangeLog entry:
2011-10-20  Kirill Yukhin  <kirill.yukhin@intel.com>

        PR target/50766
        * config/i386/i386.md (bmi_bextr_<mode>): Update register/
        memory operand order.
        (bmi2_bzhi_<mode>3): Ditto.
        (bmi2_pdep_<mode>3): Ditto.
        (bmi2_pext_<mode>3): Ditto.

testsuite/ChangeLog entry:
2011-10-20  Kirill Yukhin  <kirill.yukhin@intel.com>

        PR target/50766
        * gcc.target/i386/pr50766.c: New test.

Could you please have a look?

Thanks, K
-------------- next part --------------
A non-text attachment was scrubbed...
Name: pr50766-2.gcc.patch
Type: application/octet-stream
Size: 2654 bytes
Desc: not available
URL: <http://gcc.gnu.org/pipermail/gcc-patches/attachments/20111020/4968cd3b/attachment.obj>


More information about the Gcc-patches mailing list