PATCH: PR target/49142: Invalid 8bit register operand

[H.J. Lu]

On Wed, May 25, 2011 at 7:00 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Tue, May 24, 2011 at 5:54 PM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>> Hi,
>>
>> We are working on a new optimization, which turns off TARGET_MOVX.
>> GCC generates:
>>
>> movb %ah, %dil
>>
>> But %ah can only be used with %[abcd][hl].  This patch adds QIreg_operand
>> and uses it in *movqi_extv_1_rex64/*movqi_extzv_2_rex64.  OK for trunk
>> if there is no regression?
>
> If this is the case, then please change "q_regs_operand" predicate to
> accept just QI_REG_P registers.
>

I thought about it.  It is a problem only with %[abcd]h.  I am not sure if
changing q_regs_operand to  accept just QI_REG_P registers will negatively
impact

(define_peephole2
  [(set (reg FLAGS_REG) (match_operand 0 "" ""))
   (set (match_operand:QI 1 "register_operand" "")
        (match_operator:QI 2 "ix86_comparison_operator"
          [(reg FLAGS_REG) (const_int 0)]))
   (set (match_operand 3 "q_regs_operand" "")
        (zero_extend (match_dup 1)))]
  "(peep2_reg_dead_p (3, operands[1])
    || operands_match_p (operands[1], operands[3]))
   && ! reg_overlap_mentioned_p (operands[3], operands[0])"
  [(set (match_dup 4) (match_dup 0))
   (set (strict_low_part (match_dup 5))
        (match_dup 2))]

(define_peephole2
  [(set (reg FLAGS_REG) (match_operand 0 "" ""))
   (set (match_operand:QI 1 "register_operand" "")
        (match_operator:QI 2 "ix86_comparison_operator"
          [(reg FLAGS_REG) (const_int 0)]))
   (parallel [(set (match_operand 3 "q_regs_operand" "")
                   (zero_extend (match_dup 1)))
              (clobber (reg:CC FLAGS_REG))])]
  "(peep2_reg_dead_p (3, operands[1])
    || operands_match_p (operands[1], operands[3]))
   && ! reg_overlap_mentioned_p (operands[3], operands[0])"
  [(set (match_dup 4) (match_dup 0))
   (set (strict_low_part (match_dup 5))
        (match_dup 2))]


-- 
H.J.