[patch][simplify-rtx] Fix 16-bit -> 64-bit multiply and accumulate

[Joseph S. Myers]

On Wed, 25 May 2011, Andrew Stubbs wrote:

> On 25/05/11 14:19, Joseph S. Myers wrote:
> > RTL has defined abstract semantics and RTL transformations should be ones
> > that are valid in accordance with those semantics, with proper assertions
> > if there are additional constraints on the input passed to a function.
> > This means actually counting the numbers of variable bits in the operands
> > to determine whether the multiplication could overflow.
> 
> Ok, fair enough, so how can I identify a valid subreg extraction that is
> defined in terms of shifts?

The shift must be by a positive constant amount, strictly less than the 
precision (GET_MODE_PRECISION) of the mode (of the value being shifted).  
If that applies, the relevant number of bits is the precision of the mode 
minus the number of bits of the shift.  For an extension, just take the 
number of bits in the inner mode.  Add the two numbers of bits; if the 
result does not exceed the number of bits in the mode (of the operands and 
the multiplication) then the multiplication won't overflow.

As in your patch, either all the operands must be sign-extensions / 
arithmetic shifts (and then the result is equivalent to a widening signed 
multiply), or all must be zero-extensions / logical shifts (and the result 
is a widening unsigned multiply).

-- 
Joseph S. Myers
joseph@codesourcery.com