[Patch, AVR]: Fix PR46779

[Denis Chertykov]

2011/6/26 Georg-Johann Lay <avr@gjlay.de>:
> Denis Chertykov schrieb:
>>
>> 2011/6/24 Richard Henderson <rth@redhat.com>:
>>
>>> On 06/23/2011 01:15 PM, Denis Chertykov wrote:
>>>
>>>>>  text    data     bss     dec     hex filename
>>>>> 10032      25       0   10057    2749 bld-avr-orig/gcc/z.o
>>>>>  5816      25       0    5841    16d1 bld-avr-new/gcc/z.o
>>>>
>>>> Richard, can you send me this z.c file ?
>>>> Right now I'm notice that new code is worse.
>>>
>>> That's gcc.c-torture/compile/950612-1.c.
>>
>> I have founded that postreload optimizations can't handle results of
>> new L_R_A code.
>> I think that it's can be handled by CSE (postreload).
> Did you try to add constraint alternative to *addhi3?
> Like "*!d,d,n" or even "*!r,r,n"
>
> I saw some code improvement with that alternative.

I'm trying:

(define_insn "*addhi3"
  [(set (match_operand:HI 0 "register_operand" "=r,!w,!w,d,r,r,!d")
 	(plus:HI
 	 (match_operand:HI 1 "register_operand" "%0,0,0,0,0,0,!r")
 	 (match_operand:HI 2 "nonmemory_operand" "r,I,J,i,P,N,!ri")))]
  ""
  "@
 	add %A0,%A2\;adc %B0,%B2
 	adiw %A0,%2
 	sbiw %A0,%n2
 	subi %A0,lo8(-(%2))\;sbci %B0,hi8(-(%2))
 	sec\;adc %A0,__zero_reg__\;adc %B0,__zero_reg__
 	sec\;sbc %A0,__zero_reg__\;sbc %B0,__zero_reg__
        #"
  [(set_attr "length" "2,1,1,2,3,3,4")
   (set_attr "cc" "set_n,set_czn,set_czn,set_czn,set_n,set_n,set_n")])

;; Special split three addressing addhi3
;; to make postreload optimization possible
(define_split ; addhi3 !d,!r,!ri
  [(set (match_operand:HI 0 "d_register_operand" "")
	(plus:HI (match_operand:HI 1 "register_operand" "")
		 (match_operand:HI 2 "nonmemory_operand" "")))]
  "reload_completed"
  [(set (match_dup 0) (match_dup 2))
   (set (match_dup 0) (plus:HI (match_dup 0) (match_dup 1)))]
  "")

The main problem for me is that the new addressing mode produce a
worse code in many tests.
Although, results for gcc.c-torture/compile/950612-1.c is
significantly better with new addressing.

Denis.