[Patch : H8300] Bug fix for bit insn and minor tweaks to insns

Kaushik Phatak Kaushik.Phatak@kpitcummins.com
Thu Jun 9 07:40:00 GMT 2011

The following patch fixes an ICE that is generated when the compiler tries
to perform bit manipulation for logical operations when the source and 
destination address does not match. The testcase is also included in the 
The additional condition in the insn takes care of the ICE which occurs at '-O1'.
The other insn's are reordered to give preference to bit instructions using existing
Ok to apply?

Thanks & Regards,
Kaushik Phatak

2011-06-09  Kaushik Phatak <kaushik.phatak@kpitcummins.com>

	* config/h8300/h8300.md (bsetqi_msx, bclrqi_msx, bnotqi_msx): Added 
	condition to disallow non-identical memory locations.
	(*andqi3_2, andqi3_1, iorqi3_1, xorqi3_1): Reorder insn to give
	preference to bit manipulation instructions.
	* gcc.dg/h8300-bit-insn-ice2.2: New testcase.

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