[PATCH, ARM] Cortex-A5 tuning [2/2] - tweak instruction conditionalisation

Richard Earnshaw rearnsha@arm.com
Fri Jun 3 09:46:00 GMT 2011


On Thu, 2011-06-02 at 17:41 +0100, Julian Brown wrote:
> On Wed, 01 Jun 2011 17:00:30 +0100
> Richard Earnshaw <rearnsha@arm.com> wrote:
> 
> > 
> > On Wed, 2011-06-01 at 16:49 +0100, Julian Brown wrote:
> > > This patch tweaks the behaviour of arm_final_prescan_insn when
> > > tuning for Cortex-A5 cores, since branches are cheaper than long
> > > sequences of conditionalised instructions on those processors. As
> > > posted in the previous patch, this provides a measurable increase
> > > in performance on a popular embedded benchmark.
> > > 
> > > (I didn't use the tuning infrastructure for this one, though it
> > > could easily be changed to do so, now I come to think of it.)
> >
> > I would much prefer that this was done through the tuning
> > infrastructure.  If one core likes it this way, there's a strong
> > chance of another one coming along that has similar preferences.
> 
> How does this version look? I've left the size-optimisation case the
> same (max_insns_skipped=6), but added a "tunable" integer to the
> tune_params structure allowing the speed-optimisation case to be varied
> according to the chosen target tuning.
> 
> To maintain existing semantics, this means duplicating the "fastmul"
> structure for the StrongARM (XScale also used the StrongARM
> setting, but already has its own tuning structure).
> 
> Minimally re-tested. OK to apply?
> 
> Thanks,
> 
> Julian
> 
> ChangeLog
> 
>     gcc/
>     * config/arm/arm-cores.def (strongarm, strongarm110, strongarm1100)
>     (strongarm1110): Use strongarm tuning.
>     * config/arm/arm-protos.h (tune_params): Add max_insns_skipped
>     field.
>     * config/arm/arm.c (arm_strongarm_tune): New.
>     (arm_slowmul_tune, arm_fastmul_tune, arm_xscale_tune, arm_9e_tune)
>     (arm_v6t2_tune, arm_cortex_tune, arm_cortex_a5_tune)
>     (arm_cortex_a9_tune, arm_fa726te_tune): Add max_insns_skipped field
>     setting, using previous defaults or 1 for Cortex-A5.
>     (arm_option_override): Set max_insns_skipped from current tuning.

OK.

R.




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